☆17Aug 25, 2026Updated last month
Alternatives and similar repositories for snickerdoodle-board-files
Users that are interested in snickerdoodle-board-files are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Example projects for snickerdoodle☆29Jan 23, 2026Updated 8 months ago
- released krtkl schematics☆59Jun 29, 2018Updated 8 years ago
- snickerdoodle Linux☆18Sep 10, 2018Updated 8 years ago
- Language Bindings to interact with the BeagleBone PRUs☆10Jan 8, 2022Updated 4 years ago
- Tools to convert Kicad intermediate netlist to HDL block diagram netlist☆12Jul 21, 2016Updated 10 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Object-Oriented Programming☆12Aug 26, 2021Updated 5 years ago
- A parameterizable Vivado HLS project (C/C++) that implements a master and slave AXI-Stream to AXI-Memory-Mapped data mover (AXI-S default…☆16Aug 29, 2018Updated 8 years ago
- Opulent Voice Modulator and Demodulator in C++ (GPL)☆16Aug 21, 2026Updated last month
- DEC PDP-11 object file translator / linker☆14Sep 4, 2026Updated last month
- Example code for the Numato Opsis board, the first HDMI2USB production board.☆58Apr 27, 2018Updated 8 years ago
- Classical adaptive linear filters in Julia☆14Sep 26, 2023Updated 3 years ago
- LXI/HTTP capture of screenshots & data from bench test kit☆13May 28, 2020Updated 6 years ago
- ☆14Mar 12, 2021Updated 5 years ago
- ☆13Jun 9, 2022Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Build custom bootstrap images using bdebstrap☆19May 15, 2025Updated last year
- The official repositroy for BeagleScope project☆43Jul 16, 2019Updated 7 years ago
- FPGA based PDP-8/i clone in verilog. Includes several TSS/8 sources and utiltities to build from source☆26Jan 2, 2016Updated 10 years ago
- Design, verification and ASIC implementation of a complete RISC-V CPU with: five stages pipeline, forwarding, automatic hazard detection,…☆17Apr 12, 2020Updated 6 years ago
- Wallace and Dadda tree multiplier generator in vhdl and verilog☆14Mar 14, 2026Updated 7 months ago
- The Myriad-RF Reference Hardware design files and firmware☆50May 14, 2022Updated 4 years ago
- A Real-time, Open, Portable, Extensible Speech Lab☆16Sep 1, 2022Updated 4 years ago
- RISC-V Electronic Badge open source hardware project☆21Aug 7, 2023Updated 3 years ago
- The Numato Opsis board is the first fully open source HDMI2USB board.☆121Apr 27, 2018Updated 8 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Computer architecture learning environment using FPGAs☆15May 17, 2021Updated 5 years ago
- A little demo how to bind an advanced data science algorithms to 4 different languages☆10Nov 6, 2018Updated 7 years ago
- Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)☆72Feb 13, 2025Updated last year
- The Numato Opsis board is the first fully open source HDMI2USB board.☆13Sep 8, 2015Updated 11 years ago
- Repository containing all my presentations/tutorials/talks.☆10Sep 16, 2022Updated 4 years ago
- ☆13Mar 2, 2023Updated 3 years ago
- ☆12Nov 25, 2012Updated 13 years ago
- SpinalHDL USB system for the ULPI based Arrow DECA board☆21Jan 9, 2022Updated 4 years ago
- ☆12Oct 8, 2020Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Simulation VCD waveform viewer, using old Motif UI☆28Apr 8, 2023Updated 3 years ago
- DEC PDP-11/PDP-8 RX02 drive emulator☆24May 12, 2024Updated 2 years ago
- Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter usin…☆22Feb 4, 2025Updated last year
- A HP48GX emulator for the iPhone and iPod touch☆24Jan 2, 2022Updated 4 years ago
- Blink an LED on an FPGA in VHDL using ghdl, yosys and nextpnr☆27Jun 14, 2020Updated 6 years ago
- Python/Simulator integration using procedure calls☆10Mar 12, 2020Updated 6 years ago
- Emulate DEC LK201 keyboard using a standard PC USB keyboard☆56Aug 11, 2021Updated 5 years ago