Alternatives and similar repositories for riscv-linux:

Users that are interested in riscv-linux are comparing it to the libraries listed below

• keystone-enclave / riscv-pk
  Security monitor for Keystone Enclave (mirror of riscv-pk). Will be deprecated when openSBI port is ready
  ☆35Updated 3 years ago
• keystone-enclave / keystone-demo
  Demo host and enclave applications exercising most functionality.
  ☆31Updated last year
• keystone-enclave / keystone-sdk
  SDK for Keystone Enclave - ABI/SBI libraries and sample apps
  ☆44Updated 2 years ago
• keystone-enclave / keystone-runtime
  Eyrie enclave runtime kernel
  ☆36Updated last year
• lowRISC / lowrisc-fpga
  Untethered (stand-alone) FPGA implementation of the lowRISC SoC
  ☆54Updated 5 years ago
• firesim / firechip
  Top-Level Project for Firebox SoC, consisting of Rocket, BOOM, and peripherals (e.g. Ethernet NIC). This is the default target generator …
  ☆56Updated 5 years ago
• lowRISC / rocket
  ☆31Updated 7 years ago
• emb-riscv / specs-markdown
  The preliminary 'RISC-V microcontroller profile' specs; for convenience, use markdown.
  ☆27Updated 3 years ago
• westerndigitalcorporation / omnixtend
  An open standard Cache Coherent Fabric Interface repository
  ☆65Updated 5 years ago
• keystone-enclave / linux-keystone-driver
  Loadable Module for Keystone Enclave
  ☆19Updated 2 years ago
• SanDisk-Open-Source / riscv-fw-infrastructure
  Firmware infrastructure, contain RTOS Abstraction Layer, demos and more...
  ☆53Updated 3 years ago
• riscv-mcu / riscv-gnu-toolchain
  GNU toolchain for RISC-V, including GCC. Tweaked for microcontrollers.
  ☆29Updated 3 weeks ago
• IntelLabs / c3-simulator
  C3-Simulator is a Simics-based functional simulator for the X86 C3 processor, including library and kernel support for pointer and data e…
  ☆17Updated last week
• leviathanch / qtflow
  A Qt5 based free VLSI development tool
  ☆30Updated 6 years ago
• pwnall / sanctum
  Minimal RISC Extensions for Isolated Execution
  ☆52Updated 5 years ago
• riscv / configuration-structure
  RISC-V Configuration Structure
  ☆37Updated 4 months ago
• betrusted-io / gateware
  IP submodules, formatted for easier CI integration
  ☆29Updated last year
• ZipCPU / zbasic
  A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
  ☆43Updated 2 years ago
• chipforge / PearlRiver
  1st Testwafer for LibreSilicon
  ☆15Updated 5 years ago
• adrianlshaw / LightVerifier
  Simple and scalable Linux tools for verifying TPM-based remote attestations 🔬⚖️🔐⛓📏📜
  ☆22Updated 3 years ago
• open-isa-org / open-isa.org
  Software, tools, documentation for Vegaboard platform
  ☆64Updated 5 years ago
• secworks / blake2s
  Verilog implementation of the 32-bit version of the Blake2 hash function
  ☆21Updated 2 years ago
• betrusted-io / betrusted-ec
  Betrusted embedded controller (UP5K)
  ☆45Updated last year
• hardenedlinux / coreboot4HiFive1
  coreboot for HiFive1
  ☆12Updated 7 years ago
• scarv / xcrypto
  XCrypto: a cryptographic ISE for RISC-V
  ☆92Updated 2 years ago
• hex-five / multizone-sdk
  MultiZone® Security TEE is the quick and safe way to add security and separation to any RISC-V processors. The RISC-V standard ISA doesn'…
  ☆83Updated last year
• riscv / riscv-smbios
  RISC-V SMBIOS Type 44 Spec
  ☆12Updated last year
• ZipCPU / zipversa
  A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure
  ☆13Updated 5 years ago
• cliffordwolf / xbitmanip
  RISC-V XBitmanip Extension
  ☆27Updated 6 years ago
• westerndigitalcorporation / swerv_eh1_fpga
  FPGA reference design for the the Swerv EH1 Core
  ☆71Updated 5 years ago