Alternatives and similar repositories for linux-zynq-stable:

Users that are interested in linux-zynq-stable are comparing it to the libraries listed below

• AnttiLukats / HackaZynq
  Open Source ZYNQ Board
  ☆31Updated 9 years ago
• wzab / Z-turn-examples
  The repository with my simple Z-turn examples, to be used as templates for more serious project
  ☆17Updated 7 years ago
• olofk / i2c
  I2C controller core
  ☆16Updated 2 years ago
• AnttiLukats / OZOM-Model-A
  Open Hardware Zynq System on Module
  ☆29Updated 9 years ago
• krtkl / open-source-schematics
  released krtkl schematics
  ☆57Updated 6 years ago
• udara28 / SDRAM_Controller
  Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)
  ☆20Updated 9 years ago
• FPGAwars / Platformio-FPGA
  FPGA development in PlatformIO, using the Icestorm opensource toolchain
  ☆21Updated 8 years ago
• enjoy-digital / litejesd204b
  Small footprint and configurable JESD204B core
  ☆41Updated last month
• jsloan256 / titan
  Altium PCB project for the Titan PCI Express development card. This card uses the Lattice ECP5 FPGA.
  ☆19Updated 9 years ago
• mnentwig / busbridge3
  Xilinx 7-series FTDI-FPGA interface through JTAG with 125 us roundtrip latency
  ☆18Updated 5 years ago
• snikrepmada / Zynq_Project
  Zynq project to interface OV2640 camera module
  ☆16Updated 8 years ago
• alvieboy / ZPUino-HDL
  ZPUino HDL implementation
  ☆89Updated 6 years ago
• xupsh / Amp-zynq
  Simple AMP Running Linux and Bare-Metal System on Both Zynq SoC Processors
  ☆20Updated 9 years ago
• OpenAutomationTechnologies / VHDL_IP-Cores
  ☆16Updated 4 years ago
• whitequark / icefloorplan
  iCE40 floorplan viewer
  ☆24Updated 6 years ago
• fpga-logi / logi-hard
  All Logi specific HDL code (platform specific interface, extension boards, specific hdl, etc)
  ☆31Updated 9 years ago
• Poofjunior / HardwareModules
  A collection of portable hardware modules
  ☆26Updated 9 years ago
• westonb / artix7-PCIe
  artix-7 PCIe dev board
  ☆24Updated 7 years ago
• wd5gnr / verifla
  Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm
  ☆33Updated 6 years ago
• xesscorp / xess_fp_wizard
  A KiCad wizard to assist you in making footprints for chips having pins around the edges (SOICs, QFPs, etc.) and ball grid arrays (BGAs)
  ☆37Updated 5 years ago
• www-asics-ws / usb1_device
  USB 1.1 Device IP Core
  ☆18Updated 7 years ago
• dhrosa / ws2812-verilog
  This is a Verilog module to interface with WS2812-based LED strips.
  ☆25Updated 5 years ago
• jsyk / miilink
  Connecting FPGA and MCU using Ethernet RMII
  ☆22Updated 9 years ago
• cyrozap / python-bsdl-parser
  A Grako-based parser for IEEE 1149.1 Boundary-Scan Description Language (BSDL) files
  ☆24Updated 4 years ago
• magro732 / OpenRIO
  Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.
  ☆34Updated 7 years ago
• makestuff / libfpgalink
  LIB:Library for interacting with an FPGA over USB
  ☆84Updated 4 years ago
• tinyfpga / TinyFPGA-A-Programmer
  Low-cost (or free) programmer for TinyFPGA A-Series boards
  ☆41Updated 2 years ago
• mattvenn / ws2812-core
  verilog core for ws2812 leds
  ☆32Updated 3 years ago
• micro-FPGA / CRUVI
  CRUVI Standard Specifications
  ☆17Updated 9 months ago
• OpenDGPS / zynq-axi-dma-sg
  Simple C snippet to transfer DMA memory with scatter/gather on a Zynq 7020
  ☆54Updated 7 years ago