Alternatives and similar repositories for GeeOS:

Users that are interested in GeeOS are comparing it to the libraries listed below

• MaxXSoft / YuLang
  The Yu (羽) programming language.
  ☆77Updated last year
• HUST-OS / xv6-k210
  Port XV6 to K210 board!
  ☆136Updated 3 years ago
• ustb-owl / MimiC
  MimiC is a compiler of C subset (extended SysY language) by USTB NSCSCC team.
  ☆60Updated 2 years ago
• TianhuaTao / uCore-SMP
  A Symmetric Multiprocessing OS Kernel over RISC-V
  ☆30Updated 2 years ago
• oscomp / 2021oscomp-best-kernel-design-impl
  2021年OS比赛获奖赛题（文档/代码开源），可用于2022年参赛同学的学习和提高
  ☆48Updated 3 years ago
• js2xxx / umi
  An RISC-V experimental OS
  ☆25Updated last year
• MaxXSoft / Fuxi
  Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
  ☆173Updated 3 years ago
• segviol / indigo
  A compiler for a C-like toy language (named "SysY") into ARMv7a assembly, written in C++17
  ☆43Updated 4 years ago
• SKTT1Ryze / xv6-k210
  Porting xv6-riscv on k210
  ☆19Updated 3 years ago
• chenzhiy2001 / code-debug
  Source-level operating system debugging tool that supports debugging kernel and multiple user processes synchronously. VSCode integration…
  ☆37Updated last week
• KuangjuX / hypocaust-2
  hypocaust-2, a type-1 hypervisor with H extension run on RISC-V machine
  ☆55Updated last year
• oscourse-tsinghua / LoongsonCsprj2017-manual
  基于龙芯FPGA开发板的计算机综合系统实验
  ☆25Updated 6 years ago
• z4yx / supervisor-mips32
  计算机组成原理课程32位监控程序
  ☆48Updated 4 years ago
• oscomp / proj7-terminus
  可运行OS的RISCV-64的硬件模拟器设计与实现
  ☆22Updated 4 years ago
• ustb-owl / Lava
  A compiler of C subset by USTB OWL Wheel Lab.
  ☆12Updated 2 years ago
• TrivialCompiler / TrivialCompiler
  A toy compiler written in C++17 that translates SysY (a C-like toy language) into ARM-v7a assembly.
  ☆138Updated 3 years ago
• LearningOS / oscomp-kernel-training
  ☆47Updated 2 years ago
• cyyself / cemu
  A simple full system emulator. Currently support RV64IMACSU and MIPS32 and LoongArch32. Capable of booting Linux. Suitable for education …
  ☆116Updated 5 months ago
• ISRC-CAS / tarsier-oerv
  Project magament for porting openEuler to RISC-V
  ☆34Updated last year
• chyyuu / thoughts
  ☆42Updated last year
• IPADS-DuVisor / kvm-tutorial
  ☆23Updated last year
• shzhxh / xv6-riscv-book-CN
  xv6-riscv-book中译版
  ☆80Updated 11 months ago
• ksco / rvld
  Learn how to write a minimal working linker from scratch
  ☆101Updated 11 months ago
• howardlau1999 / yatcpu
  Yet another toy CPU.
  ☆91Updated last year
• rcore-os / zCore-Tutorial
  [WIP] Tutorial for zCore kernel.
  ☆58Updated 3 years ago
• Byte-OS / polyhal
  ☆15Updated 2 weeks ago
• oscomp / proj4-xv6-rust
  用Rust语言重新设计与实现xv6
  ☆35Updated 3 years ago
• xyongcn / LoongsonCsprj2017
  Computer System Project for Loongson FPGA Board in 2017
  ☆52Updated 6 years ago
• nkgongxl / ucoreonrv
  ☆50Updated 4 years ago
• mlzeng / CSC2020-USTC-FlammingMyCompiler
  全国大学生计算机系统能力大赛编译系统设计赛项目
  ☆243Updated 3 years ago