An analytical model and map-space exploration tool for GEMMs on HW Accelerators based on spatial architectures
☆10Oct 17, 2025Updated last year
Alternatives and similar repositories for FactorFlow
Users that are interested in FactorFlow are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Beyond Accuracy: What Matters in Designing Well-Behaved Models?☆19Oct 14, 2026Updated last week
- A library to train and deploy quantised Deep Neural Networks☆28Dec 18, 2024Updated last year
- 用于国科大自动评教。☆14Apr 23, 2024Updated 2 years ago
- ☆20May 1, 2026Updated 5 months ago
- Cost Model☆23Apr 11, 2025Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Heterogeneous Cluster Interconnect to bind special-purpose HW accelerators with general-purpose cluster cores☆17Oct 14, 2026Updated last week
- New MLIR dialect, attributes, and transformations for generating host driver code for AXI-based linalg accelerators.☆11Jan 8, 2024Updated 2 years ago
- BiomedBench is a benchmark suite of biomedical applications targeting low-power wearables☆13Sep 26, 2024Updated 2 years ago
- ☆14May 23, 2025Updated last year
- ☆13Dec 23, 2022Updated 3 years ago
- An open source generator for standard cell based memories.☆14Sep 6, 2016Updated 10 years ago
- A Rust compiler backend and runtime that compiles Rust kernels to many NPU/GPU accelerators via MLIR — vendor-agnostic (Ascend, Trainium,…☆20Updated this week
- Official implementation of the ICLR'25 paper "QERA: an Analytical Framework for Quantization Error Reconstruction".☆14Feb 4, 2025Updated last year
- 一个CIFAR100数据集的强基线结果☆19Nov 23, 2025Updated 11 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Discovering STM32 by Geoffrey Brown - Worked Exercises☆16Feb 18, 2022Updated 4 years ago
- HIR high-level synthesis compiler☆11Mar 25, 2024Updated 2 years ago
- Tuning Assistant for Floating point to Fixed point Optimization☆25Jul 30, 2026Updated 2 months ago
- Special Function Units (SFUs) are hardware accelerators, their implementation helps improve the performance of GPUs to process some of th…☆19Sep 21, 2025Updated last year
- TAPA compiles task-parallel HLS program into high-performance FPGA accelerators.☆18Updated this week
- ☆12Jun 12, 2023Updated 3 years ago
- Application Mapping Framework for spatially mapping CGRAs using Genetic Algorithm☆11May 3, 2024Updated 2 years ago
- ☆26Sep 16, 2026Updated last month
- ☆12May 18, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆10Dec 26, 2023Updated 2 years ago
- 📥 🎯 (1,4/4) an MLIR-based toolchain with Vitis HLS LLVM input/output targeting FPGAs.☆16Nov 15, 2022Updated 3 years ago
- SHA-256 cipher algorithm implementation☆13Jun 22, 2025Updated last year
- A PYNQ overlay demonstrating the Xilinx RFSoC SD-FEC☆13Sep 23, 2026Updated last month
- ☆28Feb 17, 2022Updated 4 years ago
- A stream to RTL compiler based on MLIR and CIRCT☆17Nov 15, 2022Updated 3 years ago
- Efficient Neural Network Deployment on Heterogenous TinyML Platforms☆17Sep 25, 2023Updated 3 years ago
- Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFs☆14Apr 1, 2020Updated 6 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆21Dec 10, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- OpenMP front-end based on LLVM for CGRAs☆11Oct 2, 2022Updated 4 years ago
- HierCGRA: An Open-Source Framework for Large-Scale CGRA with Hierarchical Modeling and Automated Exploration☆15Mar 6, 2023Updated 3 years ago
- This repository contains the results and code for the MLPerf™ Tiny Inference v0.7 benchmark.☆19May 18, 2023Updated 3 years ago
- ☆22Jul 30, 2024Updated 2 years ago
- Program to scan for malicious FPGA designs.☆17Mar 20, 2021Updated 5 years ago
- the xoroshiro32++ and xoroshiro64++ PRNG algorthims by David Blackman and Sebastiano Vigna in C++, Verilog, VHDL and SpinalHDL.☆16Dec 2, 2018Updated 7 years ago
- ☆20Nov 5, 2024Updated last year