wchen258 / TPAw0vView external linksLinks
A simple application that runs ARM CoreSight debug trace system on ZCU102/Kria boards. Primarily Embedded Trace Macrocell (ETM). Along with some sample code in the paper.
☆19Aug 29, 2025Updated 5 months ago
Alternatives and similar repositories for TPAw0v
Users that are interested in TPAw0v are comparing it to the libraries listed below
Sorting:
- Jmix framework☆662Feb 6, 2026Updated last week
- ADAMANT push Notification Service for iOS Messenger app☆247Dec 8, 2022Updated 3 years ago
- ADAMANT Improvement Proposal repository☆395Jun 21, 2025Updated 7 months ago
- Unified coin/token specification for wallets in ADAMANT apps☆387Sep 4, 2025Updated 5 months ago
- Command-line utilities to work with ADAMANT blockchain☆451Oct 4, 2025Updated 4 months ago
- ADAMANT Javascript API library☆445Oct 29, 2025Updated 3 months ago
- Self-hosted crypto and fiat currency rates service provider. MOEX, Currency-Api, ExchangeRate.host, Coinmarketcap, CryptoCompare and Coin…☆186Jul 18, 2024Updated last year
- Software architecture tooling for the AI age☆294Aug 4, 2025Updated 6 months ago
- Indexer for Ethereum to get transaction list by ETH address☆573Feb 13, 2024Updated 2 years ago
- Chisel3 implementation of IEEE-754 compliant floating point data type (logic & representation)☆11Dec 16, 2019Updated 6 years ago
- Like VexRiscv, but, Harder, Better, Faster, Stronger☆201Updated this week
- Linux Capable 32-bit RISC-V based SoC in System Verilog☆60Nov 19, 2025Updated 2 months ago
- Kronos is a 3-stage in-order RISC-V RV32I_Zicsr_Zifencei core geared towards FPGA implementations☆76May 15, 2023Updated 2 years ago
- The lightweight, distributed relational database built upon SQLite☆61Jul 11, 2024Updated last year
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆111Feb 3, 2026Updated last week
- 🚀 High-speed, key-value storage☆92Sep 22, 2025Updated 4 months ago
- The Open Network explorer☆209Mar 25, 2025Updated 10 months ago
- A Chrome extension to download YouTube videos in 4K, convert to MP3, and save YouTube Shorts. https://tubly.download☆261Jan 29, 2026Updated 2 weeks ago
- eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V☆239Updated this week
- A Library of Chisel3 Tools for Digital Signal Processing☆244Apr 29, 2024Updated last year
- ☆306Jan 23, 2026Updated 3 weeks ago
- CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, suppo…☆483Updated this week
- A lightweight and powerful ecommerce starter theme to build headless Shopify storefronts with Astro.☆468Updated this week
- Agent Studio Code☆282Jan 16, 2026Updated 3 weeks ago
- An FPGA-based RISC-V CPU+SoC with a simple and extensible peripheral bus. 基于FPGA的RISC-V SoC,包含一个RV32I CPU、一个简单可扩展的总线、一些外设。☆428Sep 14, 2023Updated 2 years ago
- A DDR3 memory controller in Verilog for various FPGAs☆560Oct 10, 2021Updated 4 years ago
- Simple RISC-V 3-stage Pipeline in Chisel☆603Aug 9, 2024Updated last year
- 32-bit RISC-V CPU in ~800 lines of C89☆626Jun 3, 2025Updated 8 months ago
- A template project for beginning new Chisel work☆690Jan 29, 2026Updated 2 weeks ago
- Flexible Intermediate Representation for RTL☆748Aug 20, 2024Updated last year
- Various HDL (Verilog) IP Cores☆873Jul 1, 2021Updated 4 years ago
- An Open-source FPGA IP Generator☆1,047Updated this week
- RSD: RISC-V Out-of-Order Superscalar Processor☆1,149Dec 25, 2025Updated last month
- RISC-V CPU Core (RV32IM)☆1,640Sep 18, 2021Updated 4 years ago
- Scala based HDL☆1,918Feb 5, 2026Updated last week
- SonicBOOM: The Berkeley Out-of-Order Machine☆2,072Feb 5, 2026Updated last week
- The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configura…☆2,797Updated this week
- Spike, a RISC-V ISA Simulator☆3,017Feb 4, 2026Updated last week
- ⭕️ AstroWind: A free template using Astro 5 and Tailwind CSS. Astro starter theme.☆5,429Aug 19, 2025Updated 5 months ago