scarabhardware / ScarabIDE
☆29Updated 10 years ago
Alternatives and similar repositories for ScarabIDE:
Users that are interested in ScarabIDE are comparing it to the libraries listed below
- ☆75Updated 9 years ago
- ☆23Updated 9 years ago
- The CAT Board is a Raspberry Pi HAT with a Lattice iCE40HX FPGA.☆61Updated 11 months ago
- ☆14Updated 5 years ago
- Basic code that displays simple shapes generated from Lattice FPGA directly to LVDS display☆27Updated 9 years ago
- ☆64Updated 11 years ago
- Schematics, Gerbers, Bill of materials☆34Updated 9 years ago
- Python script for programming the iCEBlink40 development board under linux☆32Updated 6 years ago
- Smalls mint tin sized BeagleBone (KiCAD version)☆58Updated 6 years ago
- ZPUino HDL implementation☆89Updated 6 years ago
- ICE40 FPGA Cape for Beaglebone☆50Updated 4 years ago
- Efficient implementations of the transcendental functions☆27Updated 8 years ago
- A 300 MHz to 3800 MHz RF module for the Novena Open Hardware Computing Platform☆51Updated 9 years ago
- Highly configurable Beaglebone PRU-based DDS☆37Updated 7 years ago
- Propeller 1 design and example files to be run on FPGA boards.☆21Updated 5 years ago
- MyBlaze is a synthesizable clone of the MicroBlaze Soft Processor written in MyHDL (http://www.myhdl.org). It started as a translation of…☆17Updated 11 years ago
- Hackaday Supercon 2019 Logic Noise Badge Workshop☆28Updated 5 years ago
- 300 MHz to 3800 MHz TCVR daughter card for the Parallella board☆18Updated 10 years ago
- multi protocol interface tool☆23Updated 7 years ago
- Python for BitBanging SPI PROM on IceZero FPGA board from RaspPi GPIO pins☆13Updated 6 years ago
- A prototyping board for various RF components☆13Updated 2 months ago
- ☆59Updated last year
- verilog tutorials for iCE40HX8K Breakout Board☆23Updated 8 years ago
- that FPGA flow☆9Updated 9 years ago
- ☆29Updated 8 years ago
- C and Verilog sources for STM32F303 + iCE5LP4K Software Defined Radio☆80Updated 7 years ago
- a simple C-to-Verilog compiler☆48Updated 7 years ago
- This is the base code using by the Mojo V3 to load the FPGA and act as a USB to serial port/ADC for the FPGA. This code is intended to be…☆35Updated 5 years ago
- Experimental graphic editor for open FPGAs.☆50Updated 8 years ago
- This repository contains software for BeagleWire. It is a realization of my project for GSOC-2017☆46Updated 6 years ago