Compiler development environment.
☆21Apr 9, 2026Updated 2 months ago
Alternatives and similar repositories for compiler-dev
Users that are interested in compiler-dev are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Template for Makefile based SysY compiler projects.☆11Jun 16, 2022Updated 3 years ago
- My second attempt at a RISC-V CPU with learnings form my previous attempt.☆10Apr 27, 2026Updated last month
- Build edk2 development and debugging environment under win10, for recording some notes and writing self tools.☆13Aug 14, 2022Updated 3 years ago
- Contains the code for the Flexus cycle-accurate simulator, used in QFlex.☆14May 18, 2026Updated 3 weeks ago
- 无需配置特定环境,在 Docker 容器环境中编译 linux-2.6.26,并在宿主机的 qemu 中运行☆14Jul 16, 2024Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Tracker for books I've read. Looking for suggestion and inspirational for others. :)☆13May 3, 2026Updated last month
- Introduction to homotopy type theory (reading course), LP2 2023, offered via DAT235/DIT577: Research-oriented course in Computer Science …☆14Apr 17, 2024Updated 2 years ago
- Learning eBPF from zero to hero☆37Dec 22, 2023Updated 2 years ago
- ☆16Mar 18, 2025Updated last year
- gem5 相关中文笔记☆16Dec 2, 2021Updated 4 years ago
- A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.☆21May 12, 2026Updated 3 weeks ago
- 本程序的目的是将苹果手表过去的运动记录方便的上传至strava,并解决导出活动中心率字段缺失的问题,支持运动类型的自动判断。The purpose of this program is to easily upload past exercise records of Ap…☆15Nov 14, 2024Updated last year
- This is a repo to store circuit design datasets☆18Jan 17, 2024Updated 2 years ago
- Tracing JIT compiler and runtime for a subset of the JVM☆26Jan 1, 2024Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- PA + Labs for Operating Systems 2019 course in NJU taught by JYY.☆12Aug 6, 2019Updated 6 years ago
- Lab material for the three week course on builiding a RISC-V microprocessor☆20Jan 14, 2026Updated 4 months ago
- A user-level tool for extracting SSD internal properties☆19Apr 8, 2023Updated 3 years ago
- A Wasm VM written in MoonBit☆43Feb 4, 2026Updated 4 months ago
- An example of an eBPF program hooking into the kill tracepoint☆22May 26, 2023Updated 3 years ago
- A 2-Way Super-Scalar OoO RISC-V Core Based on Intel P6 Microarchitecture.☆17Sep 27, 2022Updated 3 years ago
- 重庆大学计算机组成原理、硬件综合设计实验材料。☆17Jan 11, 2023Updated 3 years ago
- ☆22Nov 3, 2025Updated 7 months ago
- Recommended coding standard of Verilog and SystemVerilog.☆36Oct 21, 2021Updated 4 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- An optimal O(n) algorithm for single-robot Coverage Path Planning (CPP), implemented in Julia.☆13Jan 8, 2022Updated 4 years ago
- Practical fuzzing tutorials and training☆32Jul 15, 2024Updated last year
- The MiniDecaf test cases.☆18May 15, 2025Updated last year
- Common scripts to build BiscuitOS☆19Nov 10, 2024Updated last year
- 简化的c语言(SysY)编译器☆36Jun 4, 2022Updated 4 years ago
- A cache simulator designed to be used with memory access traces obtained from Pin (www.pintool.org)☆23Aug 21, 2018Updated 7 years ago
- Sphinx is a fast in-memory key-value store, compatible with Memcached.☆34Sep 2, 2019Updated 6 years ago
- Paper trail for the www.lsd.ufcg.edu.br reading group on systems☆23Apr 16, 2024Updated 2 years ago
- ☆58May 28, 2026Updated 2 weeks ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A RISC-V processor written in BSV, based on the Flute core. Has support for integrating tightly-coupled accelerators, and for integrating…☆24Oct 1, 2022Updated 3 years ago
- The RTL source for AnyCore RISC-V☆33Mar 18, 2022Updated 4 years ago
- hints for xv6lab in installing and doing☆11Jan 28, 2021Updated 5 years ago
- Optimized RISC-V FP emulation for 32-bit processors☆35May 26, 2021Updated 5 years ago
- UEFI UEFI UEFI☆48Apr 21, 2023Updated 3 years ago
- ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis☆33Feb 20, 2024Updated 2 years ago
- 华中师范大学ACM协会官方网站☆13Jan 2, 2026Updated 5 months ago