nicolacimmino / TRNGLinks
A True Random Number Generator for a client wishing to explore the feasibility of a hardware cryptographic device.
☆20Updated 3 years ago
Alternatives and similar repositories for TRNG
Users that are interested in TRNG are comparing it to the libraries listed below
Sorting:
- The J1 CPU☆171Updated 5 years ago
- Forth for the J1-CPU☆18Updated 8 years ago
- Minimal assembler and ecosystem for bare-metal RISC-V development☆56Updated last year
- An implementation of a CPU that uses a Linear Feedback Shift Register as a Program Counter instead of a normal one☆54Updated 7 months ago
- 32-bit RISC-V Forth for microcontrollers☆87Updated 10 months ago
- http://mecrisp.sourceforge.net/ Mecrisp-Ice is an enhanced version of Swapforth and the J1a stack processor by James Bowman, featuring th…☆30Updated 9 years ago
- Python based tool chain for the GA144 multi-computer chip☆24Updated 2 years ago
- Assembler for a 1 bit processor made around a ROM chip☆39Updated last year
- Kakao Linux☆39Updated 7 months ago
- A Lisp compiler to RISC-V machine code written in Lisp☆32Updated last year
- CCPU for GA144☆23Updated 7 years ago
- Mecrisp stellaris fork☆50Updated 3 weeks ago
- Isle FPGA Computer☆60Updated last week
- eForth for the j1 simulator and actual J1 FPGAs☆38Updated 10 years ago
- VHDL 1802 Core with TinyBASIC for the Lattice MachXO2 Pico board☆14Updated 9 years ago
- One Page CPU Project - CPU, Assembler & Emulator each in a single page of code☆83Updated last year
- Toolchain for the 8-bit TTL-CPU - http://digitarworld.uw.hu/ttlcpu.html☆36Updated 7 years ago
- Binary Lambda Calculus evaluation engine written in Malbolge.☆17Updated 3 years ago
- Forth for RISC-V SBCs☆33Updated 5 months ago
- A version of the Lisp programming language for RISC-V based boards.☆30Updated 11 months ago
- General Purpose 8 Qubit Optical Quantum Computer☆97Updated 3 years ago
- Example projects/code for the OrangeCrab☆108Updated last year
- J-Core J2/J32 5 stage pipeline CPU core☆60Updated 5 years ago
- Green Arrays Forth chip F18A simulator☆17Updated 6 years ago
- Intel 8080 CPU core: software emulator and CLaSH hardware description☆28Updated 3 years ago
- Bare-metal Forth implementation for RISC-V☆59Updated last year
- Hardware design files in Autodesk Eagle☆24Updated 4 years ago
- VHDL description of 6502 processor with FPGA synthesis support.☆34Updated 9 years ago
- Glacial - microcoded RISC-V core designed for low FPGA resource utilization☆87Updated 6 years ago
- ☆54Updated 8 years ago