ncsg-group / csRNALinks
☆13Updated last year
Alternatives and similar repositories for csRNA
Users that are interested in csRNA are comparing it to the libraries listed below
Sorting:
- ☆69Updated this week
- ☆20Updated 2 years ago
- A curated list of awesome smartnic tutorials, papers and projects.☆273Updated last month
- FpgaNIC is an FPGA-based Versatile 100Gb SmartNIC for GPUs [ATC 22]☆131Updated 2 years ago
- Flexible, high-performance TCP offload to SmartNICs using fine-grained parallelism☆58Updated 3 years ago
- A Programmable Hardware Architecture for Network Transport Logic☆35Updated 3 years ago
- An Automated Performance Optimization Framework for P4-Programmable SmartNICs☆26Updated last year
- ☆17Updated 6 months ago
- NS3 implementation of Homa Transport Protocol☆24Updated last year
- NS3 simulator for RDMA load balancing☆65Updated 10 months ago
- RecoNIC is a software/hardware shell used to enable network-attached processing within an RDMA-featured SmartNIC for scale-out computing.☆142Updated 5 months ago
- Demystifying Datapath Accelerator Enhanced Off-path SmartNIC [ICNP24]☆41Updated 8 months ago
- Justitia provides RDMA isolation between applications with diverse requirements.☆39Updated 3 years ago
- An infrastructure for inline acceleration of network applications☆30Updated 3 years ago
- Arbitrary offloads for RDMA NICs☆97Updated 3 years ago
- A Fast, Scalable and Programmable Packet Scheduler in Hardware☆38Updated 6 years ago
- Benchmark Suite for RDMA Performance Isolation☆40Updated last year
- NS3 simulator for RDMA over Converged Ethernet v2 (RoCEv2), including the implementation of DCQCN, TIMELY, PFC, ECN and shared buffer swi…☆318Updated 7 years ago
- Benchmark Test Suite for RDMA Networks☆56Updated 2 years ago
- ☆56Updated last year
- ☆66Updated 3 years ago
- A collection of tools, code, and documentation to understand the host network on real server hardware.☆37Updated 8 months ago
- ☆210Updated 3 months ago
- ☆51Updated 3 years ago
- ☆61Updated 3 months ago
- P4 source code for ConWeave load balancing☆24Updated last year
- ☆82Updated 3 years ago
- ☆46Updated 3 years ago
- ASTRA-sim2.0: Modeling Hierarchical Networks and Disaggregated Systems for Large-model Training at Scale☆415Updated 2 weeks ago
- IRN's packet processing logic synthesized using Xilinx Vivado HLS☆23Updated 6 years ago