Alternatives and similar repositories for playground-lingua-franca

Users that are interested in playground-lingua-franca are comparing it to the libraries listed below

• lf-lang / reactor-c
  A reactor runtime written in C
  ☆18Updated last week
• lf-lang / lingua-franca
  Intuitive concurrent programming in any language
  ☆259Updated this week
• xronos-inc / xronos
  Xronos revolutionizes robotics software — enabling reproducible behavior, timing control, and rapid root cause analysis through built-in …
  ☆14Updated 2 weeks ago
• openhwgroup / tristan-isolde-unified-access-page
  Unified Access Page for the TRISTAN project
  ☆16Updated 2 weeks ago
• machineware-gmbh / viper
  An Eclipse 4 RCP based GUI to interact with SystemC simulators
  ☆8Updated last month
• pulp-platform / gvsoc
  Pulp virtual platform
  ☆23Updated 2 years ago
• accellera-official / cci
  SystemC Configuration, Control and Inspection (CCI)
  ☆17Updated 2 weeks ago
• nxp-auto-linux / meta-alb
  Automotive Linux BSP Yocto Layer
  ☆9Updated 3 weeks ago
• tum-ei-eda / etiss
  Extendable Translating Instruction Set Simulator
  ☆32Updated 2 months ago
• SymbiFlow / sphinxcontrib-hdl-diagrams
  Sphinx Extension which generates various types of diagrams from Verilog code.
  ☆60Updated last year
• Isotel / mixedsim
  Hardware Design Tool - Mixed Signal Simulation with Verilog
  ☆79Updated 6 months ago
• OBPMark / OBPMark
  OBPMark (On-Board Processing Benchmarks)
  ☆32Updated last year
• hdl / conda-eda
  Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.
  ☆101Updated 4 months ago
• CEatBTU / FGPU
  FGPU is a soft GPU-like architecture for FPGAs. It is described in VHDL, fully customizable, and can be programmed using OpenCL.
  ☆56Updated 6 months ago
• semidynamics / OpenVectorInterface
  Home of the specification to connect SemiDynamic's RISC-V cores to your own RISC-V Vector Unit
  ☆37Updated 3 years ago
• pulp-platform / carfield
  A mixed-criticality platform built around Cheshire, with a number of safety/security and predictability features. Ready-to-use FPGA flow …
  ☆106Updated 2 weeks ago
• lowRISC / sonata-system
  A full micro-controller system utilizing the CHERIoT Ibex core, part of the Sunburst project funded by UKRI
  ☆45Updated this week
• zeroasiccorp / umi
  Universal Memory Interface (UMI)
  ☆146Updated this week
• KULeuven-MICAS / htvm
  Efficient Neural Network Deployment on Heterogenous TinyML Platforms
  ☆15Updated last year
• opencomputeproject / ODSA-CDXML
  TBD
  ☆12Updated 4 months ago
• polarfire-soc / polarfire-soc-bare-metal-examples
  Bare metal example software projects for PolarFire SoC
  ☆34Updated 3 months ago
• accellera-official / systemc-common-practices
  SystemC Common Practices (SCP)
  ☆28Updated 6 months ago
• accellera-official / PySysC
  Public repository for PySysC, (From SC Common Practices Subgroup)
  ☆52Updated last year
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆105Updated last year
• os-fpga / Raptor
  Raptor end-to-end FPGA Compiler and GUI
  ☆83Updated 6 months ago
• os-fpga / GettingStartedWithFPGAs
  Content for the FPGA Primer Course offered by the OSFPGA Foundation, Redwood EDA, and VLSI System Design.
  ☆34Updated last year
• artecs-group / PERCIVAL
  Open-Source Posit RISC-V Core with Quire Capability
  ☆60Updated 4 months ago
• sifferman / fusesoc_template
  Example of how to get started with olofk/fusesoc.
  ☆17Updated 3 years ago
• emanueledelsozzo / awesome-fpga-programming
  An awesome curated list of languages and tools to program FPGAs
  ☆63Updated 3 years ago
• janweinstock / or1kmvp
  An OpenRISC 1000 multi-core virtual platform based on SystemC/TLM
  ☆12Updated 3 months ago