edatasheets / digital-datasheetsLinks
☆12Updated 6 months ago
Alternatives and similar repositories for digital-datasheets
Users that are interested in digital-datasheets are comparing it to the libraries listed below
Sorting:
- A configurable and approachable tool for FPGA debugging and rapid prototyping.☆139Updated 4 months ago
- RISC-V bazel toolchains for GCC compilation☆13Updated last year
- FOSS Flow For FPGA☆400Updated 7 months ago
- Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (htt…☆136Updated 2 weeks ago
- pyVhdl2sch is a python based VHDL to (pdf) schematic converter☆32Updated 5 years ago
- Open-source RHBD (Radiation Hardened by Design) Standard-Cell Library for SKY130☆8Updated 2 months ago
- Open-source software-defined EDA☆30Updated 8 months ago
- This repo is a fork of the master OpenLANE repo for us with projects submitted on Efabless Open MPW or chipIgnite shuttles:: OpenLANE is …☆156Updated last year
- Verilog+VHDL Hierarchy Management tool ( IDE ) wraps around Vim, runs in Linux terminal window.☆12Updated 8 years ago
- Code for Bruno Levy's learn-fpga tutorial written in Amaranth HDL☆107Updated last year
- Multi-Rail Power Sequencer, capable of monitoring and sequencing up to 144 power rails, offers a configurable and rich set of features, s…☆19Updated 3 months ago
- IPbus Builder Tool☆14Updated this week
- Bazel rules for Xilinx Vivado☆19Updated 2 years ago
- Hardware Design Tool - Mixed Signal Simulation with Verilog☆80Updated 7 months ago
- A work-in-progress board-level hardware description language (HDL) providing design automation through generators and block polymorphism.☆84Updated this week
- Generate address space documentation HTML from compiled SystemRDL input☆56Updated last month
- ☆79Updated last year
- 8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x mu…☆114Updated 4 years ago
- TinyTapeout-01 submission repo☆32Updated 2 years ago
- VHDL library 4 FPGAs☆180Updated this week
- Python script to transform a VCD file to wavedrom format☆78Updated 2 years ago
- A tutorial for using nmigen☆311Updated 4 years ago
- How to set up Xilinx Vivado for source control☆106Updated 10 months ago
- Efabless mpw7 submission☆13Updated last year
- ☆54Updated last month
- Building and deploying container images for open source electronic design automation (EDA)☆115Updated 10 months ago
- Flip flop setup, hold & metastability explorer tool☆36Updated 2 years ago
- Firmware that implements a reliable high-performance control link for particle physics electronics, based on the IPbus protocol☆42Updated last month
- Bitstream Fault Analysis Tool☆14Updated 2 years ago
- Experimental flows using nextpnr for Xilinx devices☆244Updated 10 months ago