UMass-LIDS / Jedi
JEDI: model-driven trace generation for cache simulations
☆12Updated 2 months ago
Related projects ⓘ
Alternatives and complementary repositories for Jedi
- TRAGEN: A Synthetic Trace Generator for Realistic Cache Simulations☆20Updated 7 months ago
- Scaling Up Memory Disaggregated Applications with SMART☆24Updated 6 months ago
- Code for "Baleen: ML Admission & Prefetching for Flash Caches" (FAST 2024).☆21Updated 8 months ago
- TeRM: Extending RDMA-Attached Memory with SSD [FAST'24]☆37Updated last month
- ☆25Updated 3 years ago
- Canvas: Isolated and Adaptive Swapping for Multi-Applications on Remote Memory☆36Updated last year
- dLSM: An LSM-Based Index for RDMA-Enabled Memory Disaggregation☆28Updated last year
- This repository contains the source code for our ACM SIGMOD '21 paper (Maximizing Persistent Memory Bandwidth Utilization for OLAP Worklo…☆21Updated 2 years ago
- Sources for the Multi-Clock system as described in the paper: MULTI-CLOCK: Dynamic Tiering for Hybrid Memory Systems, HPCA 2022.☆19Updated 2 years ago
- Nap - NUMA-Aware Persistent Indexes☆41Updated 3 years ago
- ☆29Updated 3 years ago
- MIND: In-Network Memory Management for Disaggregated Data Centers☆42Updated 2 years ago
- Rcmp: Reconstructing RDMA-based Memory Disaggregation via CXL☆45Updated 10 months ago
- This is the implementation repository of our FAST'23 paper: FUSEE: A Fully Memory-Disaggregated Key-Value Store.☆53Updated last year
- CoRM: Compactable Remote Memory over RDMA☆19Updated 3 years ago
- The Artifact Evaluation Version of SOSP Paper #19☆40Updated 3 months ago
- Passive Disaggregated Persistent Memory at USENIX ATC 2020.☆51Updated 4 years ago
- ☆14Updated 2 months ago
- Nu is a new datacenter system that enables developers to build fungible applications that can use datacenter resources wherever they are.☆35Updated 6 months ago
- The design and algorithms used in Cacheus are described in this USENIX FAST'21 paper and talk video: https://www.usenix.org/conference/fa…☆59Updated last year
- ☆25Updated 2 years ago
- This is the source code for our (Tobias Ziegler, Jacob Nelson-Slivon, Carsten Binnig and Viktor Leis) published paper at SIGMOD’23: Desig…☆21Updated last month
- Johnny Cache: the End of DRAM Cache Conflicts (in Tiered Main Memory Systems)☆19Updated last year
- A mirror of RLib from lab.☆44Updated 3 years ago
- Hermit: Low-Latency, High-Throughput, and Transparent Remote Memory via Feedback-Directed Asynchrony☆32Updated 5 months ago
- Intel pmem benchmarks☆18Updated 2 years ago
- Fast In-memory Transaction Processing using Hybrid RDMA Primitives☆67Updated 6 years ago
- A high-performance file system for multicore CPUs and flash storage☆31Updated last year
- Artifacts of EuroSys'24 paper "Exploring Performance and Cost Optimization with ASIC-Based CXL Memory"☆21Updated 9 months ago