CoreSemi / gnss-basebandLinks
Baseband Receiver IP for GPS like DSSS signals
☆66Updated 5 years ago
Alternatives and similar repositories for gnss-baseband
Users that are interested in gnss-baseband are comparing it to the libraries listed below
Sorting:
- A low power backscatter camera platform☆62Updated 5 years ago
- 4-Port High Power USB 2.0 Hub☆188Updated 6 years ago
- A template project for the ULX3S ECP5 FPGA board using only Open Source Software☆14Updated 7 years ago
- A Monolinux distro for the Jiffy board!☆155Updated 5 years ago
- WIP 100BASE-TX PHY☆76Updated last year
- USB Product ID allocations for Free Software / Open Hardware☆218Updated 4 months ago
- A thrust-vectoring model rocket flight computer. Comes with all you need to keep your rocket pointing up.☆156Updated last year
- Cheap PCB: Better understanding the current status of hardware supply chain☆169Updated 4 years ago
- Slides and other materials for lectures related to SDR for Engineer textbook☆67Updated 7 years ago
- ☆66Updated 3 years ago
- tomu.im website☆75Updated 4 years ago
- Visually dissect and analyze bit strings☆138Updated 3 months ago
- Preemptive multithreading for AVR microcontrollers.☆37Updated 5 years ago
- Looking for docs on Precursor/Betrusted? Start here.☆186Updated 4 years ago
- SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.☆472Updated last month
- reed-solomon explainers☆32Updated 2 years ago
- Etherify - bringing the ether back to ethernet☆347Updated 4 years ago
- Rapid prototyping kit based on the nRF52840 Multiprotocol SoC, featuring Bluetooth LE, Thread, Zigbee & NFC, Easy-to-use Form Factor, nRF…☆103Updated 2 months ago
- 👇 Add capacitive touch buttons to any FPGA!☆102Updated 3 years ago
- A tiny Python environment for debugging FreeCAD macros☆63Updated 5 years ago
- UPduino 3.0: new 4 layer layout, various other improvements☆345Updated 10 months ago
- Documentation about the Tympan☆14Updated 3 years ago
- Glacial - microcoded RISC-V core designed for low FPGA resource utilization☆87Updated 6 years ago
- ☆123Updated 2 years ago
- A Software GPS decoder, going from raw 1-bit ADC samples to position fix☆167Updated 6 years ago
- Documenting Lattice's 28nm FPGA parts☆145Updated last year
- Betrusted main SoC design☆149Updated 4 months ago
- RTL logic synthesis☆118Updated last month
- Near Ultrasound Link Demo☆36Updated 5 years ago
- Hardware definition language that compiles to Verilog☆106Updated 4 years ago