Alternatives and similar repositories for OS2019-Labs:

Users that are interested in OS2019-Labs are comparing it to the libraries listed below

• pku-minic / compiler-dev
  Compiler development environment.
  ☆18Updated 4 months ago
• oscomp / proj275-eBPF-for-AI-ML-tracking-and-performance-analysis
  ☆13Updated last year
• yhtzd / skyloft
  Skyloft: A General High-Efficient Scheduling Framework in User Space (SOSP 2024)
  ☆34Updated 7 months ago
• IPADS-DuVisor / kvm-tutorial
  ☆23Updated last year
• Scientific-Computing-Lab / STREAMer
  STREAMer: Benchmarking remote volatile and non-volatile memory bandwidth
  ☆17Updated last year
• were / bfsh
  Being a full-stack hacker, RISCV, LLVM, and more.
  ☆17Updated 3 years ago
• bytedance / eurosys24-artifacts
  Artifacts of EuroSys'24 paper "Exploring Performance and Cost Optimization with ASIC-Based CXL Memory"
  ☆24Updated last year
• miaochenlu / arch_sec_papers
  ☆14Updated last month
• xu910121 / x86_64-Architecture
  x86_64体系结构学习
  ☆10Updated 6 years ago
• oscomp / proj121-page-table-using-hashtable
  使用哈希页表实现虚拟机的stage-2页表
  ☆7Updated 2 years ago
• ziyueqiu / FrozenHot
  ☆27Updated last year
• thu-cs-lab / verilog-coding-standard
  Recommended coding standard of Verilog and SystemVerilog.
  ☆34Updated 3 years ago
• decaf-lang / minidecaf-tests
  The MiniDecaf test cases.
  ☆17Updated last year
• minghust / motor
  [OSDI 2024] Motor: Enabling Multi-Versioning for Distributed Transactions on Disaggregated Memory
  ☆47Updated last year
• WukLab / Mira
  A Progam-Behavior-Guided Far Memory System
  ☆35Updated last year
• Nelson-Cheung / yatsenos-riscv
  Rebuild YatSenOS On RISC-V 64.
  ☆19Updated 3 years ago
• OS-F-4 / usr-intr
  项目的主仓库
  ☆24Updated 2 years ago
• victoryang00 / computer-architecture-revisit-a-quantitative-approach
  This repo stores a more profound view of Computer Architecture: A Quantitative Approach that tells multi-tenancy, virtualize, fine graine…
  ☆25Updated last year
• casys-kaist / ozz
  OZZ: Identifying Kernel Out-of-Order Concurrency Bugs with In-Vivo Memory Access Reordering
  ☆36Updated 7 months ago
• mytbk / gem5-docs
  gem5 相关中文笔记
  ☆14Updated 3 years ago
• uclasystem / DRust
  ☆47Updated 6 months ago
• SHTUSIST / AisLSM
  ☆12Updated 11 months ago
• oscomp / 2021oscomp-best-kernel-design-impl
  2021年OS比赛获奖赛题（文档/代码开源），可用于2022年参赛同学的学习和提高
  ☆48Updated 3 years ago
• HeliosXCore / HeliosXCore
  HeliosXCore is a Superscalar Out-of-order RISC-V Processor Core.
  ☆10Updated last year
• oscomp / proj8-RVM
  Writing a hypervisor in Rust
  ☆12Updated 3 weeks ago
• xlab-uiuc / dmt
  Artifact for Direct Memory Translation for Virtualized Clouds [ASPLOS '24]
  ☆13Updated last year
• KuangjuX / hypocaust-2
  hypocaust-2, a type-1 hypervisor with H extension run on RISC-V machine
  ☆55Updated last year
• ucare-uchicago / Queenie
  A user-level tool for extracting SSD internal properties
  ☆18Updated 2 years ago
• miaochenlu / Gem5_tutorials
  ☆19Updated last year
• dmemsys / Aceso
  This is the implementation repository of our SOSP'24 paper: Aceso: Achieving Efficient Fault Tolerance in Memory-Disaggregated Key-Value …
  ☆19Updated 6 months ago