omnetpp-models / afdxLinks
Avionics Full-Duplex Switched Ethernet model for OMNeT++
☆15Updated 8 years ago
Alternatives and similar repositories for afdx
Users that are interested in afdx are comparing it to the libraries listed below
Sorting:
- This project intends to develop tools around AFDX. (Avionics Full Duplex Switched Ethernet).☆10Updated 15 years ago
- an opensource project to enable TSN research with FAST☆38Updated 4 years ago
- ☆42Updated 4 years ago
- LeWiz Communications Ethernet MAC Core2 10G/5G/2.5G/1G☆40Updated 2 years ago
- Verilog PCI express components☆24Updated 2 years ago
- 10 Gbit/s flexible and extensible Ethernet FPGA-based traffic generator☆11Updated 11 years ago
- Simple AMP Running Linux and Bare-Metal System on Both Zynq SoC Processors☆22Updated 9 years ago
- PolyORB-HI/C runtime for Ocarina, supports POSIX, RTEMS, Xenomai, XtratuM RTOS☆12Updated 3 years ago
- ☆18Updated 5 years ago
- ☆47Updated last week
- an opensource project to enable TSN research☆41Updated 3 years ago
- Software, BSPs etc. for 5G wireless IP and PetaLinux☆19Updated 2 years ago
- Xilinx Soft-IP HDMI Rx/Tx core Linux drivers☆44Updated 3 weeks ago
- Userspace I/O library for Xilinx AXI S2MM DMA☆10Updated 2 months ago
- ☆15Updated 4 months ago
- A versatile Wireshark-compatible packet filter, capable of 100G speeds and higher. Also known as FFShark☆49Updated 4 years ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆20Updated last week
- PREEMPT_RT Linux for Real-time Edge Software☆12Updated 3 months ago
- This repository contains sample code integrating Renode with Verilator☆23Updated 5 months ago
- an abstraction layer across user-space Linux, baremetal, and RTOS environments☆25Updated 3 weeks ago
- This buildroot fork contains customized recipes for generating AMD-Xilinx SoC and Intel SoC embedded Linux images for use with MathWorks …☆27Updated 2 months ago
- FreeRTOS/lwIP (XAPP1026) for Xilinx Zynq devices using Vivado 2016.1. This port is compatible with Xilinx Vivado 2016.1 and was tested on…☆16Updated 8 years ago
- ☆22Updated 3 weeks ago
- Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.☆32Updated 8 years ago
- Library to simulate the Precision Time Protocol (PTP, IEEE 1588) in OMNeT++☆16Updated 5 years ago
- Open Component Portability Infrastructure☆62Updated 4 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Updated 3 weeks ago
- Transfer data over UDP with a Zedboard. This is an example project that transmits and receives data over UDP.☆28Updated 4 years ago
- implement PCIE devices using C or VHDL and test them against a QEMU virtualized architecture☆107Updated 7 years ago
- Small footprint and configurable JESD204B core☆49Updated 3 weeks ago