igor-m / UPduino-Mecrisp-Ice-15kB
Mecrisp-Ice Forth running on 16bit j1a processor (iCE40UP5k based UPduino board) with full 15kB of bram and 48bit Floating Point Library.
☆17Updated 6 years ago
Related projects: ⓘ
- Efficient implementations of the transcendental functions☆25Updated 7 years ago
- USB Full-Speed core written in migen/LiteX☆41Updated 5 years ago
- Software, Firmware and documentation for the myStorm BlackIce-II board☆68Updated 3 years ago
- IceCore Ice40 HX based modular core☆44Updated 3 years ago
- ☆18Updated 5 months ago
- http://mecrisp.sourceforge.net/ Mecrisp-Ice is an enhanced version of Swapforth and the J1a stack processor by James Bowman, featuring th…☆28Updated 8 years ago
- mystorm sram test☆26Updated 7 years ago
- ☆57Updated 11 months ago
- Test of ICEstick PLL usage with Yosys/Arachne-PNR/Icetools☆21Updated 7 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆34Updated last year
- FPGA 8-Bit TV80 SoC for Lattice iCE40 with complete open-source toolchain flow using yosys and SDCC☆54Updated last year
- Quickstart binaries for flashing ULX3S to factory-default state☆25Updated 2 years ago
- ☆23Updated 8 years ago
- Toolchain for the 8-bit TTL-CPU - http://digitarworld.uw.hu/ttlcpu.html☆32Updated 6 years ago
- UPDuino v1.0 - PCB Design Files, Designs, Documentation☆20Updated 6 years ago
- Contains the ROS driver and firmware for the WGE100 camera used on the PR2 robot.☆14Updated last year
- A PicoRV32 SoC for the TinyFPGA BX with peripherals designed for building games☆22Updated 5 years ago
- Tools and Examples for IcoBoard☆79Updated 3 years ago
- Hardware/Software Co-design environment of a processor core for deterministic real time systems☆37Updated last year
- A 5$ Xilinx ZYNQ development board.☆25Updated last year
- A highly-configurable and compact variant of the ZPU processor core☆34Updated 9 years ago
- UPDuino v2.0 - PCB Design Files, Designs, Documentation☆72Updated 4 years ago
- Smol 2-stage RISC-V processor in nMigen☆23Updated 3 years ago
- Forth for the J1-CPU☆16Updated 7 years ago
- PMOD boards for ULX3S☆39Updated last year
- My pergola FPGA projects☆30Updated 3 years ago
- Bootloader for Fomu☆38Updated 2 years ago
- Miscellaneous ULX3S examples (advanced)☆74Updated 10 months ago
- Example of Ada code running on the PicoRV32 RISC-V CPU for FPGA☆15Updated 6 years ago
- Constraints file and Verilog demo code for the Pano Logic Zero Client G2☆16Updated 5 years ago