Alternatives and similar repositories for agilentpyvisa:

Users that are interested in agilentpyvisa are comparing it to the libraries listed below

• jobisoft / jTDC
  FPGA based 30ps RMS TDCs
  ☆83Updated 7 years ago
• nkrackow / SingularitySurfer-FPGA-Lock-In-Amplifier
  Repository for the development of an FPGA based DSP Lock-In Amplifier
  ☆63Updated last year
• madamic / zynq_tdc
  A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC
  ☆59Updated 3 years ago
• cdsdm / cdsdm
  Cadence Virtuoso Design Management System
  ☆33Updated 2 years ago
• Nubis-Communications / SignalIntegrity
  Python tools for signal integrity applications
  ☆142Updated this week
• alex123go / RedPitaya_Acquisition
  Transform the Red Pitaya in an acquisition card
  ☆29Updated 3 years ago
• capn-freako / PyBERT
  Serial communication link bit error rate tester simulator, written in Python.
  ☆105Updated last week
• quartiq / redpid
  migen + misoc + redpitaya = digital servo
  ☆39Updated 6 years ago
• benvarkey / JuVi
  Jupyter kernel for Cadence SKILL
  ☆22Updated 8 years ago
• m-labs / tdc-core
  A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs
  ☆60Updated 10 years ago
• RuiMachado39 / TDC
  Verilog implementation of a tapped delay line TDC
  ☆39Updated 6 years ago
• KenKundert / flicker-noise
  How to correctly write a flicker-noise model for RF simulation.
  ☆20Updated 2 years ago
• henjo / pycds
  Python interface to Cadence Virtuoso data
  ☆14Updated 11 years ago
• FMCHUB / Lib_Altium
  Altium Designer libraries for ANSI/VITA 57 FPGA Mezzanine Card (FMC) Standard
  ☆43Updated 3 years ago
• vladniculescu / High-Speed-FPGA-based-Data-Acquisition-System-100MSPS
  ☆18Updated last year
• KenKundert / psf_utils
  Read Spectre PSF files
  ☆59Updated last month
• BBN-Q / VHDL-JESD204b
  JESD204b modules in VHDL
  ☆29Updated 5 years ago
• donghoonpark / ltspice_pytool
  Spice data analysis tool for python
  ☆112Updated 2 years ago
• KenKundert / rlc_chart
  A library that renders impedance charts that include capacitance and inductance grids.
  ☆13Updated last month
• mdmfernandes / socad
  Connect Cadence Virtuoso to a Python client using sockets.
  ☆15Updated 4 years ago
• ashwith / pyMOSChar
  Python port of Prof. Boris Murmann's gm/ID Starter Kit
  ☆54Updated 7 years ago
• gmagno / spyci
  A tiny Python package to parse spice raw data files.
  ☆49Updated 2 years ago
• WarwickEPR / RePLIA
  FPGA Based lock in amplifier
  ☆33Updated last year
• curtisma / VirtuosoToolboxMatlab
  MATLAB toolbox for interfacing with the Cadence Virtuoso IC Design System
  ☆29Updated 8 years ago
• unnir / CadenceSKILL-Python
  Inter Process Communication (IPC) between Python and Cadence Virtuoso
  ☆78Updated 8 years ago
• electronics-and-drives / SPAM
  SKILL Package Manager
  ☆8Updated 5 years ago
• RedPitaya / RedPitaya-FPGA
  Repository for FPGA projects
  ☆49Updated 5 months ago
• EMIL-YORKU / SensSeq
  A mixed-signal system on chip for nanopore-based DNA sequencing
  ☆34Updated 2 years ago
• QuantumQuadrate / HamamatsuCameralink
  FPGA code for reading Hamamatsu C9100 data over cameralink using SPEXI FPGA card.
  ☆20Updated 9 years ago
• ZipCPU / dspfilters
  A collection of demonstration digital filters
  ☆148Updated last year