aliireza / CacheDirector
CacheDirector - Sending Packets to the Right Slice by Exploiting Intel Last-Level Cache Addressing
☆12Updated 5 years ago
Alternatives and similar repositories for CacheDirector:
Users that are interested in CacheDirector are comparing it to the libraries listed below
- Slice-aware Memory Management - Exploiting NUCA Characteristic of LLC in Intel Processors☆39Updated 5 years ago
- Memory System Microbenchmarks☆62Updated 2 years ago
- Haystack is an analytical cache model that given a program computes the number of cache misses.☆45Updated 5 years ago
- ☆31Updated 3 years ago
- ☆37Updated 3 years ago
- Repeated access to L2-containable loops to look for snoop filter conflicts on Intel Skylake Xeon processors.☆29Updated 6 years ago
- ☆18Updated 5 years ago
- A small library and kernel module for easy access to x86 performance monitor counters under Linux.☆98Updated 9 months ago
- Source code of the simulator used in the Mosaic paper from MICRO 2017: "Mosaic: A GPU Memory Manager with Application-Transparent Support…☆43Updated 6 years ago
- A survey on architectural simulators focused on CPU caches.☆16Updated 5 years ago
- CPU micro benchmarks☆45Updated 3 weeks ago
- A simulator of a memory controller designed for hybrid DRAM+NVM.☆18Updated 9 years ago
- CUDAAdvisor: a GPU profiling tool☆48Updated 6 years ago
- ☆40Updated 7 years ago
- Performance Counter Measurements at the cycle granularity☆18Updated 3 years ago
- A low-overhead tool to periodically collect system-wide hardware performance counters on Intel64 systems.☆31Updated 2 years ago
- SST Architectural Simulation Components and Libraries☆93Updated this week
- Automatic virtualization of (general) accelerators.☆42Updated 2 years ago
- This is a mirror of the official libpfm4 git repository, https://sourceforge.net/p/perfmon2/libpfm4/ci/master/tree/ with some local branc…☆56Updated 3 months ago
- a Pin tool for collecting microarchitecture-independent workload characteristics☆60Updated last year
- This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…☆11Updated 4 years ago
- Collection of synchronization micro-benchmarks and traces from infrastructure applications☆40Updated last month
- MAFIA: Multiple Application Framework for GPU architectures☆25Updated 3 years ago
- The Splash-3 benchmark suite☆42Updated last year
- ☆28Updated 2 years ago
- HeteroSim is a full system simulator supporting x86 multicore processors combined with a FPGA via bus-based architecture. Flexible design…☆21Updated 8 years ago
- Creating beautiful gem5 simulations☆47Updated 3 years ago
- some tlb experimentation code: calculate L1, L2 miss penalties and show cross-HT interference.☆13Updated 5 years ago
- A Coherent Multiprocessor Cache Simulator Based on the SuperESCalar Cache Model☆25Updated 11 years ago
- HeteroSync is a benchmark suite for performing fine-grained synchronization on tightly coupled GPUs☆28Updated 5 months ago