QwQuQ / NTU_ET

Related projects ⓘ

Alternatives and complementary repositories for NTU_ET

• Nitcloud / Digital-IDE
  在vscode上的数字设计开发插件
  ☆328Updated last year
• sin-x / FPGA
  数字IC相关资料
  ☆983Updated 4 years ago
• HonkW93 / automatic-verilog
  automatic-verilog based on vimscript
  ☆239Updated last year
• CustomizableComputingLab / CustomizableComputingLab.github.io
  ☆137Updated 2 weeks ago
• openFPGA666 / FpgaGuide
  分享FPGA开发知识、优秀文章、学习网站以及开源项目。本项目收集了github中许多FPGA开源项目。
  ☆451Updated last year
• lizhirui / AXI_spec_chinese
  AXI协议规范中文翻译版
  ☆132Updated 2 years ago
• dumpo / digital_IC_design_notes
  数字IC设计 学习笔记
  ☆119Updated 2 years ago
• xupsh / Digital-Design-Lab
  ☆211Updated 3 years ago
• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆161Updated 3 months ago
• 1391074994 / Verilog-Hdl-Format
  Verilog Hdl Format
  ☆14Updated 5 months ago
• dumpo / my_verilog_projects
  数字IC秋招项目、手撕代码
  ☆33Updated 7 months ago
• viduraakalanka / HDL-Bits-Solutions
  This is a repository containing solutions to the problem statements given in HDL Bits website.
  ☆333Updated last year
• GuoningHuang / FPGA-CNN-accelerator-based-on-systolic-array
  2023集创赛国二，紫光同创杯。基于脉动阵列写的一个简单的卷积层加速器，支持yolov3-tiny的第一层卷积层计算，可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。
  ☆122Updated 3 weeks ago
• xiaoan109 / ysyx-workbench
  一生一芯CPU/目前做到总线之前/主要考虑ASIC DV
  ☆12Updated last week
• flytt-away / FPGA-Video-Capture
  2023集创赛紫光同创杯一等奖项目
  ☆72Updated 10 months ago
• Giftwen / CourseDigitalIC
  国科大高等数字集成电路分析与设计课程2022fall
  ☆23Updated last year
• suisuisi / FPGAandGames
  FPGA实现各种小游戏，学习并快乐着
  ☆61Updated 2 years ago
• LeiWang1999 / DigitalAlarmClock
  njtech digital design. a fpga digital alarm system with Nexys A7 100T
  ☆38Updated 5 years ago
• WeitaoZhu / Circuits_Design_FPGA
  数字电路设计与FPGA设计书籍
  ☆14Updated 2 years ago
• Starrynightzyq / Nexys4DDR-ARM-M3-Plate-Recognition
  车牌识别,FPGA,2019全国大学生集成电路创新创业大赛
  ☆129Updated 4 years ago
• wdxm657 / fpga_practice
  ☆31Updated last year
• AEEE-SummerSchool / FPGA_Camp24
  ☆40Updated 4 months ago
• troyguo / awesome-dv
  Awesome ASIC design verification
  ☆271Updated 2 years ago
• loykylewong / FPGA-Application-Development-and-Simulation
  《FPGA应用开发和仿真》（机械工业出版社2018年第1版 ISBN:9787111582786）的源码。Source Code of the book FPGA Application Development and Simulation(CHS).
  ☆126Updated last month
• adki / AMBA_AXI_AHB_APB
  AMBA bus lecture material
  ☆380Updated 4 years ago
• tyxiumud / gvim_for_verilog
  this repository is vim cfg for verilog.
  ☆41Updated 3 months ago
• Digital-EDA / Digital-IDE
  All in one vscode plugin for HDL development
  ☆409Updated this week
• lauchinyuan / Booth4_wallace_MULT16_16
  A 16-bit by 16-bit signed binary multiplier based on the Radix-4 Booth algorithm and Wallace Tree reduction
  ☆31Updated 3 months ago
• Daniel-GGB / My-Digital-IC-Library
  我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;
  ☆67Updated 2 years ago
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆128Updated 5 months ago