JasonBrave / pci-eduView external linksLinks
SystemVerilog implemention of QEMU PCI edu device
☆13May 22, 2023Updated 2 years ago
Alternatives and similar repositories for pci-edu
Users that are interested in pci-edu are comparing it to the libraries listed below
Sorting:
- A simple x86 operating system with graphical user space☆65Jul 14, 2025Updated 7 months ago
- A CSV file parser, written in SystemVerilog☆27Jul 13, 2016Updated 9 years ago
- svlib from http://www.verilab.com/resources/svlib/☆24Jun 2, 2020Updated 5 years ago
- UVM resource from github, run simulation use YASAsim flow☆33Apr 25, 2020Updated 5 years ago
- Modding the LOOΠΔ light stick with a custom PCB/firmware, rechargeable battery and a companion Android app for wireless control.☆13Sep 16, 2022Updated 3 years ago
- UVM components for DSP tasks (MODulation/DEModulation)☆14Mar 2, 2022Updated 3 years ago
- Fast Sparse Multifrontal Solver☆11May 27, 2015Updated 10 years ago
- A collection python tools used to create gguf files and upload to huggingface☆17Updated this week
- Intel(R) Distribution for GDB*☆15Jan 26, 2026Updated 2 weeks ago
- Command Line Interface with Python integration for scripting APC ap7900 and other series PDU☆10Aug 30, 2022Updated 3 years ago
- ☆15Mar 5, 2021Updated 4 years ago
- JSON lib in Systemverilog☆44Feb 23, 2022Updated 3 years ago
- ☆10Jul 5, 2021Updated 4 years ago
- non-local means filter for OpenCV☆13Jul 6, 2013Updated 12 years ago
- newest version of small C that i know about, compiles to 32-bit fasm/nasm syntax assembly☆13Feb 26, 2015Updated 10 years ago
- MobileNetV2: Inverted Residuals and Linear Bottlenecks☆10Jul 22, 2019Updated 6 years ago
- PyBitmessage API frontend for Android using QT5 and python 3☆12Oct 3, 2018Updated 7 years ago
- r2live相关论文、代码中文注释以及代码改动☆11Sep 24, 2021Updated 4 years ago
- Outdated. See https://github.com/saleae/jtag-analyzer for the official Saleae JTAG Analyzer☆12May 21, 2018Updated 7 years ago
- RISC-V RV32I CPU written in verilog☆10Jul 11, 2020Updated 5 years ago
- Small Unix like operating system written in C, for i386 (PC) CPU☆11Apr 3, 2018Updated 7 years ago
- VM-HDL Co-Simulation for Servers with PCIe-Connected FPGAs☆52Jan 19, 2021Updated 5 years ago
- Simple KMDF example driver, used as a case study in our WDF seminar.☆11Jun 16, 2021Updated 4 years ago
- n-wise coverage tool for combinatorial testing☆11Sep 7, 2019Updated 6 years ago
- Visual Studio Settings Switcher☆10Mar 12, 2017Updated 8 years ago
- SOLID principles using modern C++☆10Dec 11, 2021Updated 4 years ago
- ☆11Jan 21, 2026Updated 3 weeks ago
- Python/Simulator integration using procedure calls☆10Mar 12, 2020Updated 5 years ago
- Preserve/Generate good formatting when exporting to *.xlsx, *.yaml, *.json and when updating data.☆10Dec 19, 2019Updated 6 years ago
- Image data augmentation via flipping and rotation.☆11Jan 16, 2019Updated 7 years ago
- An efficient and scalable attention module designed to reduce memory usage and improve inference speed in large language models. Designe…☆21Jun 25, 2025Updated 7 months ago
- Parametric GPIO Peripheral☆11Jan 30, 2025Updated last year
- ASIC Design lab. Pipelined, Cached, Multicore MIPS Processor☆10Aug 23, 2017Updated 8 years ago
- CHERI sample C programs☆11Jan 16, 2025Updated last year
- qt开发界面,通过tcp发送配置文件与VxWorks通信☆10Oct 24, 2015Updated 10 years ago
- ☆10Jan 9, 2017Updated 9 years ago
- Bookmark for all your commands.☆15Oct 3, 2023Updated 2 years ago
- EasierUVM from Doulos now written in Python for easier UVM with framework and template generator☆13Sep 28, 2022Updated 3 years ago
- Examples from the Openlane repository, adapted as Fusesoc cores☆12May 18, 2021Updated 4 years ago