Alternatives and similar repositories for vrtgen

Users that are interested in vrtgen are comparing it to the libraries listed below

• catkira / open5G_phy
  A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog
  ☆211Updated 4 months ago
• RakhDamir / LimeSDR-Matlab
  LimeSDR with Matlab
  ☆11Updated 5 years ago
• maia-sdr / maia-sdr
  Maia SDR is an open-source FPGA-based SDR project focusing on the ADALM Pluto
  ☆306Updated 5 months ago
• RealDigitalOrg / RFSoC4x2-BSP
  ☆20Updated this week
• eblossom / vita-49
  Virtual Radio Transport (VRT) (VITA-49)
  ☆31Updated 12 years ago
• strath-sdr / RFSoC-Book
  Companion Jupyter Notebooks for the RFSoC-Book.
  ☆229Updated 2 years ago
• EttusResearch / fpga
  The USRP™ Hardware Driver FPGA Repository
  ☆292Updated 3 years ago
• analogdevicesinc / pyadi-iio
  Python interfaces for ADI hardware with IIO drivers (aka peyote)
  ☆193Updated last week
• xdsopl / LDPC
  Playing with Low-density parity-check codes
  ☆98Updated 2 years ago
• igorauad / gr-dvbs2rx
  DVB-S2 Receiver Extensions for GNU Radio
  ☆118Updated last year
• analogdevicesinc / TransceiverToolbox
  MATLAB toolbox for ADI transceiver products
  ☆62Updated 6 months ago
• OpenResearchInstitute / dvb_fpga
  RTL implementation of components for DVB-S2
  ☆123Updated 2 years ago
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆107Updated 2 years ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆31Updated 2 years ago
• analogdevicesinc / plutosdr_scripts
  Small scripts and examples to make interacting with the PlutoSDR easier
  ☆93Updated last year
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆120Updated last year
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆53Updated 2 years ago
• pavel-demin / red-pitaya-notes
  Notes on the Red Pitaya Open Source Instrument
  ☆374Updated last week
• MazinLab / RFSoC_OPFB
  A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC
  ☆37Updated last year
• strath-sdr / rfsoc_qsfp_offload
  RFSoC QSFP Data Offload Design with GNU Radio
  ☆24Updated 10 months ago
• analogdevicesinc / gr-iio
  IIO blocks for GNU Radio
  ☆103Updated 2 years ago
• analogdevicesinc / libad9361-iio
  IIO AD9361 library for filter design and handling, multi-chip sync, etc.
  ☆92Updated 2 months ago
• srsran / zynq_timestamping
  Open source Zynq timestamping implementation from Software Radio Systems (SRS)
  ☆73Updated 2 years ago
• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 2 years ago
• fair-acc / gnuradio4
  Prototype implementations for a more compile-time efficient flowgraph API
  ☆71Updated this week
• analogdevicesinc / ad937x-filter-wizard
  MATLAB-based FIR filter and profile designer
  ☆10Updated 8 years ago
• analogdevicesinc / plutosdr-fw
  PlutoSDR Firmware
  ☆391Updated 11 months ago
• strath-sdr / rfsoc_sam
  RFSoC Spectrum Analyser Module on PYNQ.
  ☆86Updated last year
• OpenResearchInstitute / DVB-receiver
  Work being done on the DVB-receiver for Phase 4 Ground.
  ☆58Updated 2 years ago
• analogdevicesinc / ad936x-filter-wizard
  MATLAB-based FIR filter design
  ☆59Updated last year