FFGGSSJJ / SmartSSD-Oriented-Work
SmartSSD related benchmarks and toy applications
☆8Updated last year
Alternatives and similar repositories for SmartSSD-Oriented-Work:
Users that are interested in SmartSSD-Oriented-Work are comparing it to the libraries listed below
- This is the respository that holds the artifacts of MICRO'23 -- Demystifying CXL Memory with True CXL-Ready Systems and CXL Memory Device…☆44Updated last year
- ☆94Updated last year
- ☆68Updated last year
- CXL-DMSim: A Full-System CXL Disaggregated Memory Simulator Based on gem5☆61Updated this week
- This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews shoul…☆34Updated 8 months ago
- The Artifact of NeoMem: Hardware/Software Co-Design for CXL-Native Memory Tiering☆44Updated 7 months ago
- ☆36Updated last year
- ☆26Updated last year
- CXLMemSim: A pure software simulated CXL.mem for performance characterization☆148Updated this week
- gem5-nvmain hybrid simulator supporting simulation of DRAM-NVM hybrid memory system☆76Updated 5 years ago
- ☆30Updated 4 years ago
- ☆7Updated 4 years ago
- Exploring the Design Space of Page Management for Multi-Tiered Memory Systems (USENIX ATC '21)☆45Updated 2 years ago
- Clio, ASPLOS'22.☆72Updated 3 years ago
- Pond: CXL-Based Memory Pooling Systems for Cloud Platforms (ASPLOS'23)☆195Updated 5 months ago
- CXL Memory Resource Kit top-level repository☆50Updated 2 years ago
- An FPGA-based full-stack in-storage computing system.☆37Updated 4 years ago
- Source code for the software implementation of Sibyl proposed in our ISCA 2022 paper: Gagandeep Singh et. al., "Sibyl: Adaptive and Exten…☆34Updated 2 years ago
- The Artifact Evaluation Version of SOSP Paper #19☆45Updated 7 months ago
- This is a processing-in-memory simulator which models 3D-stacked memory within gem5. Also includes the workloads used for IMPICA (In-Memo…☆44Updated 7 years ago
- Tiered memory management☆74Updated 6 months ago
- this is a repository based on gem5 and aims to be modified for CXL☆21Updated last year
- ☆12Updated 7 months ago
- A Cycle-level simulator for M2NDP☆25Updated 3 months ago
- This repository contains an extended version of SMCSim (originally by Erfan Azarkhish), used for near-data-processing research by Jiwon C…☆14Updated 4 years ago
- Examples of DPU programs using the UPMEM DPU SDK☆40Updated last month
- VANS: A validated NVRAM simulator☆27Updated last year
- A Full-System Simulator for CXL-Based SSD Memory System☆18Updated 3 months ago
- OSDI'24 Nomad implementation☆43Updated 3 months ago
- Sources for the Multi-Clock system as described in the paper: MULTI-CLOCK: Dynamic Tiering for Hybrid Memory Systems, HPCA 2022.☆19Updated 3 years ago