uw-x / tinysdr
First SDR platform for IoT networks
☆176Updated last month
Alternatives and similar repositories for tinysdr:
Users that are interested in tinysdr are comparing it to the libraries listed below
- Maia SDR is an open-source FPGA-based SDR project focusing on the ADALM Pluto☆258Updated last week
- AD9361 based USB3 SDR☆101Updated 7 years ago
- Open source Zynq timestamping implementation from Software Radio Systems (SRS)☆68Updated 2 years ago
- ANTSDR Firmware☆135Updated 2 years ago
- ☆34Updated last week
- PlutoSDR Firmware☆359Updated 5 months ago
- Enable your Pluto SDR to become a stand-alone OFDM transceiver with batman-adv mesh network routing capabilities☆118Updated 4 years ago
- Hands on labs for the ADALM Pluto SDR☆61Updated 3 years ago
- AD936x+7Z020+USB HS dongle, In development...☆50Updated 3 years ago
- Documentation for the Lime Microsystems second generation transceiver IC☆99Updated 4 years ago
- This repo contains both the uhd host driver and firmware for microphase antsdr devices.☆68Updated 2 months ago
- LiteX based M2 SDR FPGA board.☆97Updated last week
- Soapy SDR plugin for PlutoSDR☆64Updated 5 months ago
- Cypress FX3 firmware for the USB 3.0 LimeSDR board☆66Updated 2 years ago
- Altera Cyclone IV FPGA project for the USB 3.0 LimeSDR board☆103Updated 3 years ago
- Design files for sdr5 prototype (Zynq + AD9363)☆97Updated 5 years ago
- Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom☆105Updated 4 years ago
- a simple and cheap vector network analyzer, including support software☆159Updated 4 years ago
- 4 port eCal module☆77Updated 2 weeks ago
- 1MHz to 6GHz USB based vector network analyzer☆138Updated 4 years ago
- LimeSDR-Mini PCB Altium project☆179Updated 5 years ago
- Lessons to learn about Software Defined Radios (SDR) through GNUradio☆159Updated 4 months ago
- PYNQ-Z1 + AD936X openwifi capable SDR platform☆84Updated 2 years ago
- LimeSDR-Mini board FPGA project☆60Updated 2 years ago
- DIY digital beamformer using ADALM-PLUTO☆76Updated last week
- Repository of antsdr firmware make☆59Updated 2 weeks ago
- A ressource efficient, customizable, synthesizable 5G NR lower PHY written in Verilog☆204Updated last year
- The old code for our 36 channel rtl-sdr based coherent receiver☆102Updated 8 months ago
- Python interfaces for ADI hardware with IIO drivers (aka peyote)☆166Updated this week
- IIO AD9361 library for filter design and handling, multi-chip sync, etc.☆85Updated 4 months ago