Alternatives and similar repositories for SpectrePoC

Users that are interested in SpectrePoC are comparing it to the libraries listed below

• defuse / flush-reload-attacks
  ☆197Updated last year
• isec-tugraz / transientfail
  Website and PoC collection for transient execution attacks
  ☆200Updated last year
• isec-tugraz / drama
  This repository contains examples of DRAMA reverse-engineering and side-channel attacks
  ☆193Updated 8 years ago
• cgvwzq / evsets
  Tool for testing and finding minimal eviction sets
  ☆107Updated 4 years ago
• Eugnis / spectre-attack
  Example of using revealed "Spectre" exploit (CVE-2017-5753 and CVE-2017-5715)
  ☆773Updated 7 years ago
• HexHive / SMoTherSpectre
  Proof-of-concept code for the SMoTherSpectre exploit.
  ☆76Updated 6 years ago
• FPSG-UIUC / lotr
  Source code of the paper "Lord of the Ring(s): Side Channel Attacks on the CPU On-Chip Ring Interconnect Are Practical"
  ☆144Updated 4 years ago
• gregvish / l1tf-poc
  L1TF (Foreshadow) VM guest to host memory read PoC
  ☆113Updated 7 years ago
• isec-tugraz / cache_template_attacks
  This repository contains several tools to perform Cache Template Attacks
  ☆163Updated last month
• paboldin / meltdown-exploit
  Meltdown Exploit PoC
  ☆948Updated 7 years ago
• vusec / hammertime
  ☆152Updated 7 years ago
• gkaindl / meltdown-poc
  A quick PoC to try out the "meltdown" timing attack.
  ☆153Updated 7 years ago
• isec-tugraz / flush_flush
  This repository contains examples of Flush+Flush cache attacks
  ☆169Updated 4 years ago
• DanGe42 / flush-reload
  [UNMAINTAINED] Implementation of the FLUSH+RELOAD side channel attack
  ☆63Updated 8 years ago
• vusec / bhi-spectre-bhb
  This repository contains exploit and reverse-engineering source code regarding the Spectre-BHB/Branch History Injection vulnerability
  ☆118Updated 3 years ago
• jovanbulck / sgx-step
  A practical attack framework for precise enclave execution control
  ☆466Updated last month
• vusec / trrespass
  TRRespass
  ☆125Updated 4 years ago
• jovanbulck / nemesis
  Nemesis: Studying microarchitectural timing leaks in rudimentary CPU interrupt logic
  ☆90Updated 4 years ago
• isec-tugraz / sgxrop
  The code to the SGX-ROP paper
  ☆184Updated 5 years ago
• cgvwzq / spectre
  My minimal PoC for spectre
  ☆40Updated 7 years ago
• intel / xom-switch
  ☆56Updated 3 years ago
• isec-tugraz / flipfloyd
  Tools for "Another Flip in the Wall"
  ☆39Updated 7 years ago
• isec-tugraz / KAISER
  Kernel Address Isolation to have Side-channels Efficiently Removed
  ☆223Updated 4 years ago
• cispa / osiris
  Proof-of-concept implementation for the paper "Osiris: Automated Discovery of Microarchitectural Side Channels" (USENIX Security'21)
  ☆64Updated 6 months ago
• flowyroll / uarchsec
  ☆47Updated 7 years ago
• OSUSecLab / SgxPectre
  ☆77Updated 7 years ago
• ibm-research / speculator
  Tool to Analyze Speculative Execution Attacks and Mitigations
  ☆56Updated 4 years ago
• comsec-group / retbleed
  Arbitrary Speculative Code Execution with Return Instructions
  ☆175Updated last year
• KitMurdock / plundervolt
  ☆185Updated 4 years ago
• codexlynx / hardware-attacks-state-of-the-art
  Microarchitectural exploitation and other hardware attacks.
  ☆95Updated last year