Fraunhofer-AISEC / archie
ARCHIE is a QEMU-based architecture-independent fault evaluation tool, that is able to simulate transient and permanent instruction and data faults in RAM, flash, and processor registers.
☆24Updated 2 weeks ago
Alternatives and similar repositories for archie
Users that are interested in archie are comparing it to the libraries listed below
Sorting:
- SyzTrust's main repository. Start here to install.☆17Updated last year
- A tool for detecting Spectre vulnerabilities through fuzzing☆40Updated 3 years ago
- Telling your secrets without page faults: Stealthy page table-based attacks on enclaved execution☆31Updated 7 years ago
- Tool to Analyze Speculative Execution Attacks and Mitigations☆55Updated 3 years ago
- Proof-of-concept implementation for the paper "Efficient and Generic Microarchitectural Hash-Function Recovery" (IEEE S&P 2024)☆28Updated last year
- Proof-of-concept implementation for the paper "Osiris: Automated Discovery of Microarchitectural Side Channels" (USENIX Security'21)☆57Updated 3 years ago
- ☆21Updated last year
- Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)☆65Updated last month
- An open-source deterministic fault attack simulator prototype☆58Updated 4 years ago
- Pre-Silicon Hardware Fuzzing Toolkit☆56Updated last week
- A tool to enable fuzzing for Spectre vulnerabilities☆30Updated 5 years ago
- Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser☆61Updated 2 years ago
- The top repository for the code accompanying our paper "Mind the Gap: Studying the Insecurity of Provably Secure Embedded Trusted Executi…☆13Updated 2 years ago
- Using Malicious #VC Interrupts to Break AMD SEV-SNP (IEEE S&P 2024)☆24Updated last year
- A port of the RIPE suite to RISC-V.☆29Updated 6 years ago
- RISC-V Tools (GNU Toolchain, ISA Simulator, Tests)☆21Updated 6 years ago
- Differential Address Trace Analysis☆56Updated last year
- Rage Against The Machine Clear: A Systematic Analysis of Machine Clears and Their Implications for Transient Execution Attacks☆21Updated 3 years ago
- Side-channel analysis setup for OpenTitan☆31Updated 2 weeks ago
- Revizor - a fuzzer to search for microarchitectural leaks in CPUs☆123Updated this week
- ☆45Updated 2 years ago
- The open-source component of Prime+Scope, published at CCS 2021☆30Updated last year
- Artifacts for our ShowTime paper (AsiaCCS '23), including distinguishing cache hits and misses with the human eye.☆12Updated last year
- A microarchitectural leakage detection framework using dynamic instrumentation.☆73Updated 2 months ago
- [UNMAINTAINED] Implementation of the FLUSH+RELOAD side channel attack☆62Updated 7 years ago
- Fuzzer that searches for vulnerabilities like Spectre and Meltdown in CPUs☆42Updated 2 years ago
- ARM CCA support for QEMU. Check wiki for instructions. https://github.com/Huawei/Huawei_CCA_RMM/wiki☆24Updated 2 years ago
- ☆43Updated 6 years ago
- Tool for testing and finding minimal eviction sets☆101Updated 4 years ago
- ☆16Updated 2 years ago