This repository is for my solutions for Stanford CS 106X.
☆12Nov 17, 2018Updated 7 years ago
Alternatives and similar repositories for CS106X
Users that are interested in CS106X are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 《Computer Systems: A Programmer's Perspective》(3rd Edition)☆36Sep 29, 2021Updated 4 years ago
- Implemented a two-level (L1 and L2) cache simulator in C++ with round robin eviction policy☆10Jan 4, 2017Updated 9 years ago
- ☆17Mar 23, 2025Updated last year
- Aioli: A unified optimization framework for language model data mixing☆32Jan 17, 2025Updated last year
- An implementation of unsupervised example of the Forward-Forward algorithm proposed by (Hinton, 2022)☆11Jun 19, 2024Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- PyTorch implementation of Hinton's FF Algorithm with hard negatives sampling☆15Dec 19, 2022Updated 3 years ago
- ☆11Sep 9, 2022Updated 3 years ago
- ☆13Mar 15, 2026Updated last week
- Verilog code of Loongson's GS132 core☆12Dec 19, 2019Updated 6 years ago
- 遵循GPL-2.0规则，将phoenix kernel部分开源☆13Sep 15, 2022Updated 3 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆12May 6, 2019Updated 6 years ago
- Simulator for a superscalar processor with dynamic scheduling and branch prediction☆15Nov 23, 2018Updated 7 years ago
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆22Apr 25, 2025Updated 11 months ago
- Header-only C/C++ static keys to avoid the overhead of conditional branches☆14Feb 10, 2024Updated 2 years ago
- DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Simple PyTorch profiler that combines DeepSpeed Flops Profiler and TorchInfo☆11Feb 12, 2023Updated 3 years ago
- 2022年春复旦大学大二下组成与体系结构实验☆15Feb 20, 2023Updated 3 years ago
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆20Nov 9, 2025Updated 4 months ago
- Caffe 源码注释☆15Aug 15, 2017Updated 8 years ago
- 经典的嵌入式OS - ucos-II 2.52版本全注释，仅供学习交流使用。☆12Oct 16, 2019Updated 6 years ago
- A virtio layer for xv6☆12Apr 16, 2019Updated 6 years ago
- Lower chisel memories to SRAM macros☆13Mar 25, 2024Updated 2 years ago
- Works for Applied Deep Learning / Machine Learning and Having It Deep and Structured (2017 FALL) @ NTU☆11Aug 14, 2018Updated 7 years ago
- simple 4-BIT CPU with 74-serials chip，origin by Kaoru Tonami in his book “How to build a CPU”☆14Oct 19, 2024Updated last year
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- ☆35Feb 10, 2025Updated last year
- FPGA Labs for EECS 151/251A (Fall 2021)☆11Oct 20, 2021Updated 4 years ago
- Explore what LLMs are really leanring over SFT☆28Mar 30, 2024Updated last year
- CV32E40X Design-Verification environment☆16Mar 25, 2024Updated 2 years ago
- RISCV CPU implementation tutorial steps for Cologne Chip Gatemate E1, adopted from https://github.com/BrunoLevy/learn-fpga☆16Mar 3, 2026Updated 3 weeks ago
- Linux porting to NonTrivialMIPS (based on linux-stable)☆12Aug 17, 2019Updated 6 years ago
- Explore the behavior SystemC kernel event-driven simulator (aka "the engine")☆12Jan 17, 2024Updated 2 years ago
- This is a simple Risc-v core for software simulation on FPGA.☆10Apr 9, 2022Updated 3 years ago
- My tests and experiments with some popular dl frameworks.☆17Sep 11, 2025Updated 6 months ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- A docker image for One Student One Chip's debug exam☆10Sep 22, 2023Updated 2 years ago
- A Flexible Cache Architectural Simulator☆17Sep 16, 2025Updated 6 months ago
- livecoding talk for oscon 2018☆10Jul 18, 2018Updated 7 years ago
- A simple cycle accurate template model for ASIC/FPGA hardware design. Including a cycle accurate FIFO design example. More designs are co…☆17Sep 5, 2019Updated 6 years ago
- Contains the code for the Flexus cycle-accurate simulator, used in QFlex.☆14Updated this week
- A suite of tools for pretty printing, diffing, and exploring abstract syntax trees.☆15Mar 3, 2026Updated 3 weeks ago
- A Virtual platform using DBT-RISE-RISCV capable of running unmodified FreeRTOS☆14Jan 30, 2024Updated 2 years ago