This repository is for my solutions for Stanford CS 106X.
☆12Nov 17, 2018Updated 7 years ago
Alternatives and similar repositories for CS106X
Users that are interested in CS106X are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Life time calculator. How many days will I live? How many days do I live? Death time calculator. When will i die?☆16Sep 19, 2026Updated 3 weeks ago
- Implemented a two-level (L1 and L2) cache simulator in C++ with round robin eviction policy☆10Jan 4, 2017Updated 9 years ago
- Codebase for ICML submission "DOGE: Domain Reweighting with Generalization Estimation"☆21Feb 29, 2024Updated 2 years ago
- A curated collection of research papers exploring diversity in Large Language Model text generation. This repository tracks cutting-edge …☆18Jun 19, 2026Updated 3 months ago
- Generate python ctypes classes from C headers. Requires LLVM clang☆15Aug 14, 2024Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- PyTorch implementation of Hinton's FF Algorithm with hard negatives sampling☆15Dec 19, 2022Updated 3 years ago
- ☆15Apr 28, 2026Updated 5 months ago
- Repository for Computer Architecture Class at UC Berkeley☆10Nov 25, 2019Updated 6 years ago
- Verilog code of Loongson's GS132 core☆12Dec 19, 2019Updated 6 years ago
- Data 100: Principles and Techniques of Data Science http://www.ds100.org/su20/☆14Sep 1, 2020Updated 6 years ago
- 遵循GPL-2.0规则，将phoenix kernel部分开源☆13Sep 15, 2022Updated 4 years ago
- ☆11Sep 9, 2022Updated 4 years ago
- Alpha64 R10000 Two-Way Superscalar Processor☆12May 6, 2019Updated 7 years ago
- Explore the behavior SystemC kernel event-driven simulator (aka "the engine")☆12Jan 17, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Aioli: A unified optimization framework for language model data mixing☆34Jan 17, 2025Updated last year
- Official repo for Shoot First, Ask Questions Later?☆27Apr 23, 2026Updated 5 months ago
- Easy-to-use MIRAGE code for faithful answer attribution in RAG applications. Paper: https://aclanthology.org/2024.emnlp-main.347/☆25Mar 10, 2025Updated last year
- A virtio layer for xv6☆12Apr 16, 2019Updated 7 years ago
- Header-only C/C++ static keys to avoid the overhead of conditional branches☆14Feb 10, 2024Updated 2 years ago
- Simple PyTorch profiler that combines DeepSpeed Flops Profiler and TorchInfo☆12Feb 12, 2023Updated 3 years ago
- A Flexible Cache Architectural Simulator☆17Sep 16, 2025Updated last year
- Caffe 源码注释☆15Aug 15, 2017Updated 9 years ago
- ☆22Oct 29, 2025Updated 11 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- Lower chisel memories to SRAM macros☆13Mar 25, 2024Updated 2 years ago
- ☆20Nov 21, 2025Updated 10 months ago
- simple 4-BIT CPU with 74-serials chip，origin by Kaoru Tonami in his book “How to build a CPU”☆15Oct 19, 2024Updated last year
- Works for Applied Deep Learning / Machine Learning and Having It Deep and Structured (2017 FALL) @ NTU☆11Aug 14, 2018Updated 8 years ago
- 2022年春复旦大学大二下组成与体系结构实验☆16Feb 20, 2023Updated 3 years ago
- 经典的嵌入式OS - ucos-II 2.52版本全注释，仅供学习交流使用。☆14Oct 16, 2019Updated 7 years ago
- FPGA Labs for EECS 151/251A (Fall 2021)☆13Oct 20, 2021Updated 4 years ago
- CV32E40X Design-Verification environment☆19Jun 2, 2026Updated 4 months ago
- My tests and experiments with some popular dl frameworks.☆17Sep 11, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆13Aug 12, 2022Updated 4 years ago
- This is a simple Risc-v core for software simulation on FPGA.☆10Apr 9, 2022Updated 4 years ago
- livecoding talk for oscon 2018☆10Jul 18, 2018Updated 8 years ago
- A docker image for One Student One Chip's debug exam☆10Sep 22, 2023Updated 3 years ago
- Linux on RISC-V on FPGA (LOROF): RV64GC Sv39 Quad-Core Superscalar Out-of-Order Virtual Memory CPU☆19Oct 2, 2026Updated 2 weeks ago
- Explore what LLMs are really leanring over SFT☆28Mar 30, 2024Updated 2 years ago
- A simple cycle accurate template model for ASIC/FPGA hardware design. Including a cycle accurate FIFO design example. More designs are co…☆17Sep 5, 2019Updated 7 years ago