xmos / lib_tflite_micro

Related projects ⓘ

Alternatives and complementary repositories for lib_tflite_micro

• openhwgroup / core-v-sw
  Main Repo for the OpenHW Group Software Task Group
  ☆15Updated last week
• xmos / ai_tools
  AI applications and tools
  ☆25Updated this week
• XUANTIE-RV / thead-extension-spec
  XuanTie vendor extension Instruction Set spec
  ☆30Updated 2 months ago
• chipsalliance / rocket-chip-blocks
  RTL blocks compatible with the Rocket Chip Generator
  ☆14Updated 4 months ago
• riscvarchive / riscv-edk2-platforms
  Port of EDK2 implementation of UEFI to RISC-V. See documentation at:
  ☆18Updated 3 years ago
• uec-hanken / tee-hardware
  TEE hardware - based on the chipyard repository - hardware to accelerate TEE
  ☆20Updated last year
• betrusted-io / gateware
  IP submodules, formatted for easier CI integration
  ☆28Updated 11 months ago
• XUANTIE-RV / xuantie-yocto
  Yocto project for Xuantie RISC-V CPU
  ☆37Updated 5 months ago
• stellaraccident / mlir-py-release
  ☆11Updated 3 years ago
• wsong83 / Asynchronous-Verilog-Synthesiser
  Synthesiser for Asynchronous Verilog Language
  ☆19Updated 10 years ago
• RTEMS / rtems-docs
  Mirror only see https://gitlab.rtems.org/rtems/docs/rtems-docs/
  ☆10Updated this week
• BabbleSim / base
  BabbleSim base/common components. Any BabbleSim user will want some of these.
  ☆13Updated 3 weeks ago
• xcore / tool_axe
  An XCore Emulator
  ☆15Updated 6 years ago
• atrosinenko / memtest86-plus-riscv
  Port of original MemTest86+ v5.1 to other architectures (RISC-V for now)
  ☆15Updated 4 years ago
• sabbaghm / c-ll-verilog
  An LLVM based mini-C to Verilog High-level Synthesis tool
  ☆35Updated last year
• sifive / block-pio-sifive
  An example of on-boarding a PIO block in with duh and wake
  ☆12Updated 4 years ago
• eembc / telebench
  TeleBench™ is a suite of benchmarks that allows the users to approximate the performance of processors in modem and related fixed-telecom…
  ☆12Updated 3 years ago
• tommythorn / yari
  YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includ…
  ☆44Updated 5 years ago
• keystone-enclave / linux-keystone-driver
  Loadable Module for Keystone Enclave
  ☆18Updated 2 years ago
• riscv-admin / riscv-landscape
  🌄 RISC-V Ecosystem Landscape: a living document that developers, investors, vendors, researchers and others can use as a resource on the…
  ☆14Updated this week
• dhammikamare / arm-sim
  A Web based ARM Instruction Set Simulator
  ☆11Updated 9 years ago
• riscvarchive / riscv-zicond
  The ISA specification for the ZiCondOps extension.
  ☆19Updated 8 months ago
• JohnDRO / Golirev-IDE
  An online Verilog IDE based on YosysJS.
  ☆24Updated 8 years ago
• KestrelComputer / polaris
  RISC-V RV64IS-compatible processor for the Kestrel-3
  ☆21Updated last year
• stnolting / neorv32-riscof
  ✔️Port of RISCOF to check the NEORV32 for RISC-V ISA compatibility.
  ☆25Updated this week
• riscvarchive / riscv-code-speed-optimization
  ☆12Updated 3 years ago
• embecosm / riscv-gdbserver
  GDB Server for interacting with RISC-V models, boards and FPGAs
  ☆20Updated 5 years ago
• eembc / securemark-tls
  The official repository for EEMBC's SecureMark™-TLS cryptography benchmark.
  ☆15Updated last year
• ucb-bar / cva6-wrapper
  Wrapper for ETH Ariane Core
  ☆19Updated 3 months ago