Alternatives and similar repositories for SherwoodArch

Users that are interested in SherwoodArch are comparing it to the libraries listed below

• animetosho / jit_smc_test
  Test self-modifying code behaviour on processors for single-use JIT functions
  ☆53Updated 5 years ago
• beehive-lab / ProtonVM
  Parallel Bytecode Interpreter For Heterogeneous Hardware
  ☆12Updated 4 years ago
• sifiveinc / wake
  The SiFive wake build tool
  ☆91Updated this week
• google / autopiper
  ☆48Updated 10 years ago
• mballance / fwrisc-s
  ☆10Updated 6 years ago
• KestrelComputer / polaris
  RISC-V RV64IS-compatible processor for the Kestrel-3
  ☆21Updated 2 years ago
• jeremyroman / llvm-brainfuck
  An LLVM-based compiler for Brainfuck.
  ☆49Updated 12 years ago
• tomahawkins / verilog
  A Verilog parser for Haskell.
  ☆36Updated 4 years ago
• SiliconSemantics / firrtlator
  firrtlator is a FIRRTL C++ library
  ☆23Updated 8 years ago
• JohnDRO / Golirev-IDE
  An online Verilog IDE based on YosysJS.
  ☆24Updated 9 years ago
• momalab / cryptoleq
  Cryptoleq: A Heterogeneous Abstract Machine for Encrypted and Unencrypted Computation.
  ☆32Updated last year
• combinatorylogic / soc
  An experimental System-on-Chip with a custom compiler toolchain.
  ☆60Updated 5 years ago
• jameshegarty / rigel
  Rigel is a language for describing image processing hardware embedded in Lua. Rigel can compile to Verilog hardware designs for Xilinx FP…
  ☆56Updated 5 years ago
• cliffordwolf / bextdep
  Reference Hardware Implementations of Bit Extract/Deposit Instructions
  ☆25Updated 8 years ago
• vkrasnov / avx_qsort
  Quick sort code using AVX2 instructions
  ☆69Updated 8 years ago
• mmastrac / bootstrap
  Bootstrapping VM for bare metal to trusted C compilation
  ☆50Updated last year
• KestrelComputer / S64X7
  64-bit MISC Architecture CPU
  ☆13Updated 8 years ago
• CTSRD-CHERI / beri
  The BERI and CHERI processor and hardware platform
  ☆50Updated 8 years ago
• rose-compiler / rose-develop
  The latest development version of rose. It may not pass all regression tests.
  ☆106Updated 6 years ago
• stevenknown / xgen
  ☆36Updated 2 months ago
• eliben / wcx64
  Clone of wc in x64 assembly
  ☆94Updated last year
• zhmu / ananas
  Ananas Operating System
  ☆56Updated 3 years ago
• mrisc32 / mrisc32
  MRSIC32 ISA documentation and development
  ☆91Updated 2 years ago
• jix / sortnetopt
  Lower Size Bounds for Sorting Networks
  ☆46Updated 4 years ago
• sumith1896 / tusSAT
  A SAT solver implementation in VHDL, team tussle
  ☆21Updated 9 years ago
• google / minetest_pnr
  Place & Router for Minetest
  ☆18Updated 3 years ago
• kkuehlz / virtual_vec
  ☆32Updated 4 years ago
• YoWASP / yosys
  Unofficial Yosys WebAssembly packages
  ☆74Updated this week
• hellige / ccs-cpp
  CCS in C++
  ☆26Updated 2 years ago
• IdanHo / RISCVEmu
  A Basic C++ RISC-V Emulator
  ☆19Updated 4 years ago