Alternatives and similar repositories for carrefour-runtime

Users that are interested in carrefour-runtime are comparing it to the libraries listed below

• ydmao / Metis
  MapReduce for multi-core
  ☆50Updated 12 years ago
• rice-systems / quicksilver
  Quicksilver superpage management system
  ☆11Updated 4 years ago
• Carrefour / carrefour-module
  This module collects per-page stats and decide for each page if it should be migrated, replicated or interleaved.
  ☆16Updated 10 years ago
• ix-project / zygos
  ☆33Updated 8 years ago
• maleadt / pChase
  Pointer-chasing memory benchmark (forked from Doug Pase's code).
  ☆59Updated 12 years ago
• bestephe / loom
  The code for both the framework and experiments from the NSDI '19 paper "Loom: Flexible and Efficient NIC Packet Scheduling"
  ☆31Updated 6 years ago
• sslab-gatech / latr
  Latr: Lazy Translation Coherence - ASPLOS'18
  ☆15Updated 4 years ago
• larsbergstrom / NUMA-STREAM
  The classic STREAM benchmark, extended to measure NUMA effects.
  ☆38Updated 6 years ago
• apanwariisc / HawkEye
  The implementation of HawkEye, our research system: "HawkEye: Efficient Fine-grained OS Support for Huge Pages" from ASPLOS 2019.
  ☆21Updated 4 years ago
• efficient / mica2
  A fast in-memory key-value store
  ☆52Updated 8 years ago
• trigonak / ccbench
  A tool for measuring the cache-coherence latencies of a processor (i.e., the latencies of loads, stores, CAS, FAI, TAS, and SWAP).
  ☆79Updated 3 years ago
• multifacet / 0sim-workspace
  Tools and experiments for 0sim. Simulate system software behavior on machines with terabytes of main memory from your desktop.
  ☆21Updated 5 years ago
• GPUPeople / GPUMemManSurvey
  Evaluating different memory managers for dynamic GPU memory
  ☆26Updated 5 years ago
• efficient / HERD
  ☆68Updated 8 years ago
• aliireza / slice-aware
  Slice-aware Memory Management - Exploiting NUCA Characteristic of LLC in Intel Processors
  ☆41Updated 6 years ago
• ucb-bar / ccbench
  Memory System Microbenchmarks
  ☆65Updated 2 years ago
• acsl-technion / spin
  ☆46Updated 8 years ago
• heechul / palloc
  DRAM Bank-Aware Kernel Memory Allocator
  ☆45Updated 3 weeks ago
• yuhong-zhong / bpf-storage-hotos
  ☆21Updated 4 years ago
• intel / idxd-config
  Accel-config / libaccel-config
  ☆69Updated 5 months ago
• rs3lab / SynCord
  https://rs3lab.github.io/SynCord/
  ☆26Updated 3 years ago
• eelejalde / rw-numa-locks
  NUMA-Aware Reader-Writer Locks
  ☆19Updated 11 years ago
• TheNetAdmin / LENS-VANS
  Characterizing and Modeling Non-Volatile Memory Systems [MICRO'20, TopPicks'21]
  ☆32Updated 4 years ago
• ut-osa / strata
  Strata: A Cross Media File System
  ☆74Updated 2 years ago
• ut-osa / gpunet
  GPUnet is a native GPU networking layer that provides a socket abstraction over Infiniband to GPU programs for NVIDIA GPUs.
  ☆117Updated 10 years ago
• intel / uintr-ipc-bench
  ☆38Updated last year
• intel / DTO
  A user level library for applications to transparently use Intel DSA.
  ☆40Updated 2 months ago
• uclasystem / MemLiner
  MemLiner is a remote-memory-friendly runtime system.
  ☆31Updated 3 years ago
• kozyraki / phoenix
  an API and runtime environment for data processing with MapReduce for shared-memory multi-core & multiprocessor systems.
  ☆97Updated last year
• sylab / multi-clock
  Sources for the Multi-Clock system as described in the paper: MULTI-CLOCK: Dynamic Tiering for Hybrid Memory Systems, HPCA 2022.
  ☆19Updated 3 years ago