Alternatives and similar repositories for Todo_TELEMATICA

Users that are interested in Todo_TELEMATICA are comparing it to the libraries listed below

• FPGAsm / FPGAsm
  A low-level hierarchical netlist assembler for FPGAs
  ☆11Updated 3 years ago
• douggilliland / Design_A_CPU
  Design a CPU in VHDL
  ☆11Updated 3 years ago
• lnls-dig / dsp-cores
  Repository containing the DSP gateware cores
  ☆13Updated this week
• tedyapo / maxima-circuits
  Maxima functions for circuit calculations
  ☆23Updated 5 years ago
• hosseinfani / digital_odyssey
  Materials for the Computer Science course, Digital Design (Logic Circuits)
  ☆9Updated 3 years ago
• krabo0om / pauloBlaze
  A plain VHDL implementation of a small microprocessor fully compatible with the ISA of the well known PicoBlaze by Ken Chapman.
  ☆22Updated 4 years ago
• tmeissner / gatemate_experiments
  Experiments with Cologne Chip's GateMate FPGA architecture
  ☆15Updated last year
• ultraembedded / altor32
  AltOr32 - Alternative Lightweight OpenRisc CPU
  ☆12Updated 9 years ago
• PavlenkoG / ECP5_PCIE_Analyzer
  ☆14Updated last year
• jherkenhoff / Bitmap-VHDL-Package
  A vhdl package for reading and writing bitmap files.
  ☆11Updated 7 years ago
• Galland / LEON2
  LEON2 SPARC CPU IP core LGPL by Gaisler Research
  ☆18Updated 12 years ago
• juliancoy / openStreamHDL
  VHDL Code for infrastructural blocks (designed for FPGA)
  ☆15Updated 2 years ago
• enazuma11 / Circuits
  Basic Circuits in Logisim
  ☆10Updated 6 years ago
• JohnDMcMaster / project2064
  XC2064 bitstream documentation
  ☆16Updated 6 years ago
• pepijndevos / seqpu
  A bit-serial CPU
  ☆19Updated 5 years ago
• umarcor / SIEAV
  Co-simulation and behavioural verification with VHDL, C/C++ and Python/m
  ☆13Updated this week
• teeshina / soc_leon3
  System on Chip SPARC V8 using leon3 CPU by Gaisler. C++, vhdl, v files.
  ☆11Updated 12 years ago
• mkvenkit / ulx3s_examples
  Beginner-friendly Verilog based examples for the ULX3S FPGA board.
  ☆11Updated 3 years ago
• campera-es / ces_util_lib
  CES VHDL utility library, with packages, memories, FIFOs, Clock Domain Crossing and more useful VHDL modules
  ☆11Updated 3 years ago
• danselmi / sycira
  symbolic circuit analyzer for the Maxima computer algebra system
  ☆14Updated 4 years ago
• KestrelComputer / S64X7
  64-bit MISC Architecture CPU
  ☆12Updated 8 years ago
• zeeshanrafique23 / RV32I-Logisim
  RV32I single cycle simulation on open-source software Logisim.
  ☆19Updated 2 years ago
• TUT-ASI / leon3-grlib-gpl-mirror
  Automated Git mirror of Gaisler's GRLIB/Leon3 releases
  ☆17Updated 2 months ago
• prantoamt / 16bit_processor_design
  ☆12Updated 6 years ago
• RobertBaruch / mz80
  Formally-verified Z80 core written using nMigen
  ☆11Updated 5 years ago
• sinkswim / vhdllib
  My own VHDL components library. Anything from a flip flop to an ALU.
  ☆12Updated last year
• lzw545 / opengg
  OpenGL-like graphics pipeline on a Xilinx FPGA
  ☆32Updated 14 years ago
• lawrie / tiny_ram_soc
  Picorv32 SoC that uses only BRAM, not flash memory
  ☆13Updated 6 years ago
• douggilliland / FPGA_Games
  FPGA Games Gathered from GitHub in one place
  ☆20Updated 2 years ago
• lawrie / up5k-demos
  ice40 UltraPlus demos
  ☆16Updated 5 years ago