Xilinx/AMD FPGA & MPSoC Vivado design skill for Claude — covers block design, IP config, XDC constraints, synthesis, implementation and bitstream generation.
☆259Apr 25, 2026Updated 3 weeks ago
Alternatives and similar repositories for xilinx-skill
Users that are interested in xilinx-skill are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆14Jan 24, 2023Updated 3 years ago
- OpenExSys_NoC a mesh-based network on chip IP.☆20Dec 1, 2023Updated 2 years ago
- ☆133May 4, 2026Updated 2 weeks ago
- [DATE'2025, TCAD'2025] Terafly : A Multi-Node FPGA Based Accelerator Design for Efficient Cooperative Inference in LLMs☆36Nov 13, 2025Updated 6 months ago
- ☆15Mar 19, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Official release of Gengram models.☆47Mar 17, 2026Updated 2 months ago
- ☆12Aug 1, 2022Updated 3 years ago
- A SystemC + DRAMSim2 simulator for exploring the SpMV hardware accelerator design space.☆15Nov 9, 2014Updated 11 years ago
- A guide on how to emulate an NVMe SPDM responder device with QEMU and Linux. Additionally, instructions on setting up and testing the (in…☆11Sep 3, 2024Updated last year
- Linux applications to manage, test and develop devices supporting DMTF Security Protocol and Data Model (SPDM)☆18Updated this week
- Benchmarks, testbenches, and transformed codes for high-level synthesis research☆13Aug 18, 2017Updated 8 years ago
- Hardware implementation of the SipHash short-inout PRF☆17Apr 3, 2025Updated last year
- Shielded Enclaves for Cloud FPGAs☆15Nov 24, 2021Updated 4 years ago
- Is a collection of NULL Convention Logic (NCL) circuits and libraries written in Verilog to provide the experience of logically determine…☆15Jun 15, 2016Updated 9 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- FSA: Fusing FlashAttention within a Single Systolic Array☆112Apr 15, 2026Updated last month
- The Gtgraph library from Georgia Tech.☆19Mar 30, 2023Updated 3 years ago
- This work implements a dynamic programming algorithm for performing local sequence alignment. Through parallelism, it can run 136X times …☆28Jul 4, 2019Updated 6 years ago
- Securing platform software☆20Apr 10, 2023Updated 3 years ago
- ☆19Feb 22, 2018Updated 8 years ago
- Recursive unified ORAM☆16Sep 23, 2015Updated 10 years ago
- Program to read/write from/to any location in physical memory (cloned from devmem or devmem2). See wiki.☆19Aug 16, 2019Updated 6 years ago
- Hardware Accelerators (HwAs) constructed in Vivado HLS☆20Jul 17, 2017Updated 8 years ago
- ☆19May 30, 2019Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- tpu-systolic-array-weight-stationary☆25May 7, 2021Updated 5 years ago
- The Intel® Software Guard Extensions Enclave Memory Manager is a module designed to manage dynamic memory within an SGX runtime.☆29Updated this week
- ☆11Sep 14, 2020Updated 5 years ago
- This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, an…☆22Nov 27, 2025Updated 5 months ago
- A multi-banked non-blocking cache that handles efficiently thousands of outstanding misses, especially suited for bandwidth-bound latency…☆21Dec 3, 2020Updated 5 years ago
- An MLIR-based compiler from C/C++ to AMD-Xilinx Versal AIE☆17Aug 5, 2022Updated 3 years ago
- Repository for AI model benchmarking on TT-Buda☆16Feb 9, 2026Updated 3 months ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆23Aug 10, 2018Updated 7 years ago
- The wafer-native AI accelerator simulation platform and inference engine.☆55Jan 1, 2026Updated 4 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Network on-Chip (NoC) simulator for simulating intra-chip data flow in Neural Network Accelerator☆37Dec 22, 2023Updated 2 years ago
- C++ package to store Matrix Market (.mtx) file format sparse matrices in Compressed Row Storage (CSR) format.☆16Oct 16, 2019Updated 6 years ago
- ☆13Updated this week
- Verilog implementation of the SHA-1 cryptgraphic hash function☆58Apr 3, 2025Updated last year
- A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.☆52Aug 31, 2025Updated 8 months ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆29Jul 7, 2019Updated 6 years ago
- ☆35Feb 27, 2026Updated 2 months ago