Alternatives and similar repositories for sgxdedup

Users that are interested in sgxdedup are comparing it to the libraries listed below

• mbailleu / avocado
  ☆17Updated 4 years ago
• YuchongHu / echash
  ACM SoCC 2019, "Coupling Decentralized Key-Value Stores with Erasure Coding"
  ☆15Updated 4 years ago
• dgist-datalab / deepsketch-fast2022
  ☆24Updated 3 years ago
• yuhong-zhong / bpf-storage-hotos
  ☆21Updated 4 years ago
• cocoppang / ShieldStore
  Trusted in-memory key-value store based on ShieldStore which is published in EuroSys 2019
  ☆39Updated 3 years ago
• SJTU-IPADS / cocytus
  Cocytus is an efficient and available in-memory K/V-store through hybrid erasure coding and replication
  ☆30Updated 9 years ago
• LPD-EPFL / mu
  Mu: Microsecond Consensus for Microsecond Applications
  ☆41Updated 5 years ago
• ukulililixl / openec
  ☆34Updated 6 months ago
• WukLab / pDPM
  Passive Disaggregated Persistent Memory at USENIX ATC 2020.
  ☆51Updated 5 years ago
• yzr95924 / DEBE
  A shielded DbE-based deduplicated storage system based on Intel SGX in USENIX ATC'22
  ☆17Updated 3 years ago
• ukulililixl / ParaRC
  ☆23Updated 6 months ago
• nnzhaocs / DupHunter
  ☆16Updated 4 years ago
• yzr95924 / storage_paper_list
  Some paper lists related to storage systems
  ☆49Updated 2 weeks ago
• TheNetAdmin / LENS-VANS
  Characterizing and Modeling Non-Volatile Memory Systems [MICRO'20, TopPicks'21]
  ☆32Updated 4 years ago
• chenzhangyu / Clevel-Hashing
  Lock-free Concurrent Level Hashing for Persistent Memory (USENIX ATC 2020)
  ☆50Updated 4 years ago
• dmemsys / SMART
  This is the implementation repository of our OSDI'23 paper: SMART: A High-Performance Adaptive Radix Tree for Disaggregated Memory.
  ☆63Updated last year
• SymbioticLab / Leap
  Prefetching and efficient data path for memory disaggregation
  ☆71Updated 5 years ago
• thu-pacman / TriCache
  A User-Transparent Block Cache Enabling High-Performance Out-of-Core Processing with In-Memory Programs
  ☆76Updated last month
• BLepers / JohnnyCache
  Johnny Cache: the End of DRAM Cache Conflicts (in Tiered Main Memory Systems)
  ☆20Updated 2 years ago
• Thesys-lab / cacheWorkloadAnalysisOSDI20
  ☆16Updated 4 years ago
• basicthinker / Sexain-MemController
  A simulator of a memory controller designed for hybrid DRAM+NVM.
  ☆22Updated 10 years ago
• pkusys / dRAID
  Artifacts for our ASPLOS'23 paper dRAID
  ☆29Updated 2 years ago
• cyjseagull / gem5-nvmain-hybrid-simulator
  gem5-nvmain hybrid simulator supporting simulation of DRAM-NVM hybrid memory system
  ☆79Updated 6 years ago
• thustorage / max
  A high-performance file system for multicore CPUs and flash storage
  ☆34Updated 2 years ago
• saramcallister / Kangaroo
  ☆35Updated 4 years ago
• hku-systems / apus
  An RDMA-powered, fast, and scalable Paxos protocol
  ☆26Updated 6 years ago
• WukLab / Pythia
  Pythia is a set of RDMA-based remote side-channel attacks. USENIX Security 2019.
  ☆30Updated 5 years ago
• lingfenghsiang / Persistent-Memory-Study
  ☆26Updated 3 years ago
• pkusys / Auncel
  Vector search with bounded performance.
  ☆35Updated 2 years ago
• sslab-gatech / latr
  Latr: Lazy Translation Coherence - ASPLOS'18
  ☆15Updated 4 years ago