Sobel–Feldman, Prewitt, Canny filter
☆19Nov 9, 2019Updated 6 years ago
Alternatives and similar repositories for Sobel-Feldman
Users that are interested in Sobel-Feldman are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆16Aug 21, 2019Updated 6 years ago
- AVR CPU Core Implementation in Verilog HDL.☆14Oct 28, 2018Updated 7 years ago
- 64-bit MISC Architecture CPU☆13Dec 13, 2016Updated 9 years ago
- Verilog IP Cores & Tests☆13May 3, 2018Updated 7 years ago
- Base on Synopsys platform using VCS,DC,ICC,PT.☆11May 29, 2021Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting with the flexibility to host WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Cloudways by DigitalOcean.
- Verilog CAN controller that is compatible to the SJA 1000.☆16Apr 17, 2021Updated 4 years ago
- Synthesis using Synopsys DC and Physical Design flow using Synopsys ICC II, of my RISC-V 5 stage pipelined using 32 nm tech repo☆14Jul 31, 2024Updated last year
- RTL implementation for Advanced Encryption Standard (AES) in Verilog. Synthesis Done in Synopsys DC.☆10Dec 11, 2020Updated 5 years ago
- This paper presents design of UART module for serial communication used for short-distance, low speed and exchange of data between comput…☆15Mar 30, 2022Updated 4 years ago
- H.264/AVC Baseline Decoder☆16Jul 17, 2014Updated 11 years ago
- Humble microlibrary / command line tool for summarizing data within Weights and Biases across runs.☆14Aug 22, 2019Updated 6 years ago
- Y80e - Z80/Z180 compatible processor extended by eZ80 instructions☆21Jul 17, 2014Updated 11 years ago
- openMSP430 CPU core (from OpenCores)☆22Oct 14, 2022Updated 3 years ago
- The open- MSP430 is an open-source 16-bit microcontroller core written in Verilog, that is compatible with the Texas Instruments MSP430 m…☆18Jan 28, 2022Updated 4 years ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- Multi-threaded 32-bit embedded core family.☆24Jul 9, 2012Updated 13 years ago
- Benchmarks for Yosys development☆24Feb 17, 2020Updated 6 years ago
- A 32-bit MIPS processor which aims for conformance to the MIPS32 Release 1 ISA.☆19Jul 29, 2015Updated 10 years ago
- Cycle accurate MC6502 compatible processor in Verilog.☆16Oct 11, 2021Updated 4 years ago
- For replication of the experiments in the paper Learning Robust Representations by Projecting Superficial Statistics Out☆13Oct 22, 2019Updated 6 years ago
- My PhD thesis, titled "Reasonably Programmable Syntax"☆15Aug 28, 2018Updated 7 years ago
- 国内加速，可视化批量下载huggingFace文件☆18Jul 9, 2024Updated last year
- Easy communication with NDI trackers (Polaris Vicra, Spectra, Vega, and Aurora)☆59Jun 6, 2024Updated last year
- A simple JPEG2000 hardware encoder☆25Sep 29, 2020Updated 5 years ago
- Wordpress hosting with auto-scaling on Cloudways • AdFully Managed hosting built for WordPress-powered businesses that need reliable, auto-scalable hosting. Cloudways SafeUpdates now available.
- MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计☆22May 24, 2023Updated 2 years ago
- Single Image Backdoor Inversion via Robust Smoothed Classifiers☆17Jul 18, 2023Updated 2 years ago
- GDS visualization, geometry analysis, and parallelized capacitance extraction at field-solver accuracy. MS thesis project.☆25Jul 1, 2024Updated last year
- Reed Solomon Encoder and Decoder Digital IP☆22Jun 14, 2020Updated 5 years ago
- PNG encoder, implemented in VHDL☆23Mar 30, 2024Updated 2 years ago
- This repository presents ASIC design flow for UART utilizing RTL to GDS implementation This has been simulated on VCS and has been impl…☆27Apr 29, 2024Updated last year
- OpenPiton Design Benchmark☆28Mar 6, 2023Updated 3 years ago
- PID controller☆25Jul 17, 2014Updated 11 years ago
- A VerilogHDL MCU Core based ARMv6 Cortex-M0☆22Jan 31, 2020Updated 6 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Verilog Implementation of Run Length Encoding for RGB Image Compression☆28Jun 28, 2021Updated 4 years ago
- Pytorch version of "Deep Convolutional Networks as shallow Gaussian Processes" by Adrià Garriga-Alonso, Carl Rasmussen and Laurence Aitch…☆32Apr 16, 2020Updated 5 years ago
- A pipelined MIPS CPU supporting 31 MIPS instructions, interrupt and cache.☆20Jul 12, 2015Updated 10 years ago
- This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of ORCA which was taped-out by NTI.☆28Feb 11, 2024Updated 2 years ago
- ARM-CPU implemented verilog☆29Jan 13, 2024Updated 2 years ago
- Implementation of Patch-wise Adversarial Regularization from "Learning Robust Global Representations by Penalizing Local Predictive Power…☆18Oct 27, 2019Updated 6 years ago
- RAD: Reinforcement Learning with Augmented Data (code for procgen experiments)☆18Mar 29, 2021Updated 5 years ago