☆18Aug 22, 2023Updated 3 years ago
Alternatives and similar repositories for farneback3d
Users that are interested in farneback3d are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Collocate xarray trajectories in arbitrary physical dimensions☆20Sep 6, 2018Updated 8 years ago
- In this project, we address the problem of eye-blink detection and analysis of left and right human eye blinks using EEG signals with hel…☆14Aug 7, 2018Updated 8 years ago
- K-FACE Analysis Project on Pytorch☆10Sep 6, 2021Updated 5 years ago
- 利用微信服务号给自己发通知☆11May 27, 2019Updated 7 years ago
- ☆12Feb 15, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Gibbs-Sampling based Rauch-Tung-Striebel Smoother (Code for ACC 2011 paper)☆13Jul 11, 2016Updated 10 years ago
- GPU/CUDA optimized implementation of 3D optical flow algorithms such as Farneback two frame motion estimation and Lucas Kanade dense opti…☆14Jun 26, 2023Updated 3 years ago
- Code for "Simultaneous Face Hallucination and Translation for Thermal to Visible Face Verification using Axial-GAN"☆15Apr 15, 2021Updated 5 years ago
- ☆11Sep 25, 2023Updated 3 years ago
- SE-ResNeXt based Illustration2vec with sketch data☆15Mar 15, 2019Updated 7 years ago
- An implementation of PDAVIS live demo☆11Feb 29, 2024Updated 2 years ago
- ICCV 2023 Improving Equivariance in State-of-the-Art Supervised Depth and Normal Predictors☆17Jun 30, 2024Updated 2 years ago
- ☆13Feb 13, 2021Updated 5 years ago
- ☆11Jan 21, 2019Updated 7 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 这是一个基于Qt开发的DCA1000EVM远程采集的程序☆10Jun 23, 2026Updated 3 months ago
- Python scripts form performing stereo depth estimation using the HITNET model in Tensorflow Lite.☆41Sep 7, 2021Updated 5 years ago
- RISC-V CPU in SystemVerilog & Custom Migen-based SoC Generator☆11Dec 29, 2021Updated 4 years ago
- e300 and u500 devkits☆10Nov 15, 2020Updated 5 years ago
- An example of on-boarding a PIO block in with duh and wake☆12Nov 18, 2020Updated 5 years ago
- Heart Rate Variability☆15Nov 30, 2019Updated 6 years ago
- A document-focused, decluttered mode of JupyterLab that uses activity-based design☆11Jan 7, 2023Updated 3 years ago
- Tensorflow Lite Android Deeplab Object Image Segmentation Demo☆13Nov 26, 2019Updated 6 years ago
- ☆12Feb 16, 2019Updated 7 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- ECG signal conditioning by Morphological Filtering - Biomedical Signal Processing project☆11Mar 27, 2025Updated last year
- RADIX-4 SRT division☆13Oct 31, 2019Updated 6 years ago
- Python scripts for tracking cells in fluorescent microscopy.☆11Dec 10, 2017Updated 8 years ago
- Wake build descriptions of hardware generators☆12Dec 11, 2020Updated 5 years ago
- A DMA Controller for RISCV CPUs☆13Aug 10, 2015Updated 11 years ago
- Automatic multiscale-based peak detection algorithm implementation in multiple languages☆17Oct 12, 2017Updated 9 years ago
- Simple and effective parallel CRC calculator written in synthesizable SystemVerilog☆15Apr 11, 2019Updated 7 years ago
- Python program to run on a Raspberry Pi to measure heart and respiratory rate with a radar.☆23May 28, 2020Updated 6 years ago
- Wishbone <-> AXI converters☆13Jun 1, 2015Updated 11 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☁ Converting sets of XYZ points to nice GIF animations.☆14May 25, 2020Updated 6 years ago
- Simple MIDAS Examples☆12Nov 25, 2018Updated 7 years ago
- Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards☆20Aug 15, 2026Updated 2 months ago
- Converting systemverilog to verilog.☆10Feb 15, 2018Updated 8 years ago
- Chisel3 AXI4-{Lite, Full, Stream} Definitions☆15Dec 31, 2018Updated 7 years ago
- Network components (NIC, Switch) for FireBox☆20Oct 27, 2024Updated last year
- A C++/OpenGL mesh viewer for OBJ format models.☆18May 20, 2022Updated 4 years ago